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[209.132.180.67]) by mx.google.com with ESMTP id m12-v6si31818338pls.498.2018.05.29.11.27.19; Tue, 29 May 2018 11:27:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dCvLbQ7+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965937AbeE2S1Q (ORCPT + 30 others); Tue, 29 May 2018 14:27:16 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:52148 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966078AbeE2S1C (ORCPT ); Tue, 29 May 2018 14:27:02 -0400 Received: by mail-wm0-f67.google.com with SMTP id r15-v6so15559711wmc.1 for ; Tue, 29 May 2018 11:27:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UjJ3jHtjRvBxlDd6Ytc7ZMcJePkg8WNNH+GK66dAf2w=; b=dCvLbQ7+snXAOaX6QpkfrFl4lgSl8//58m1BMoHLHt7BVmVcVAnchm6bNcJEJwSg4t vxcLgOZY74quTptUrMt8+cpiKz7djeTg0s10hC+BzWla/qJE/dCUzs/AsVzjg6g+MI6T j73iiZ9K011kyr5xhft8EiGNBWUfzvmz5Um64= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UjJ3jHtjRvBxlDd6Ytc7ZMcJePkg8WNNH+GK66dAf2w=; b=tPOpCl7v6twGCHdzTmEIQbBVl+IRln8dVdTJrf5upgehd12QMIZEKm0Dok7UhvgrkJ uyjKtRtedvLNM2EZKR3j734JNWWjc1+wAYYwAmcjBNLo6NSq2linDaHZnexlrcREbvi7 EioanNVcAQlOX7t77X2i/mktrk4cNdE6m6gstB4iRa8R+hH2L2OXattMf9j7tCkcUbz9 F2jfCETKa5Wr1I3DvT7z2bR2KVbIM0DgPCeXlRFyjk51MnAdWdyS0wi2JNmcHkx7RUCW c3xJOLyxFtmpvK/28YM2PA5eM9Runs7TEoGT5tp4Pxj8Ke711JZLl0/QsC0a+Psgna58 GOQQ== X-Gm-Message-State: ALKqPwdKUo5TdVycsU9IBFee8G+I6UoiMWw5AIbCvjpoPbYKbwLb/1BF H3ZRp12L3GUe826D9dl7A8jTiQ== X-Received: by 2002:a1c:6f57:: with SMTP id k84-v6mr6301wmc.142.1527618421162; Tue, 29 May 2018 11:27:01 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:c07c:1556:b860:2283]) by smtp.gmail.com with ESMTPSA id 135-v6sm27027893wmx.21.2018.05.29.11.27.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 May 2018 11:27:00 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Matt Redfearn Subject: [PATCH 2/7] clocksource/drivers/mips-gic-timer: Add pr_fmt and reword pr_* messages Date: Tue, 29 May 2018 20:26:37 +0200 Message-Id: <1527618402-31974-2-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527618402-31974-1-git-send-email-daniel.lezcano@linaro.org> References: <1274a543-02dd-bbf0-c690-b08c788d9e91@linaro.org> <1527618402-31974-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Matt Redfearn Several messages from the MIPS GIC driver include the text "GIC", "GIC timer", etc, but the format is not standard. Add a pr_fmt of "mips-gic-timer: " and reword the messages now that they will be prefixed with the driver name. Signed-off-by: Matt Redfearn Signed-off-by: Daniel Lezcano --- drivers/clocksource/mips-gic-timer.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c index 986b679..54f8a33 100644 --- a/drivers/clocksource/mips-gic-timer.c +++ b/drivers/clocksource/mips-gic-timer.c @@ -5,6 +5,9 @@ * * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. */ + +#define pr_fmt(fmt) "mips-gic-timer: " fmt + #include #include #include @@ -136,8 +139,7 @@ static int gic_clockevent_init(void) ret = setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction); if (ret < 0) { - pr_err("GIC timer IRQ %d setup failed: %d\n", - gic_timer_irq, ret); + pr_err("IRQ %d setup failed (%d)\n", gic_timer_irq, ret); return ret; } @@ -176,7 +178,7 @@ static int __init __gic_clocksource_init(void) ret = clocksource_register_hz(&gic_clocksource, gic_frequency); if (ret < 0) - pr_warn("GIC: Unable to register clocksource\n"); + pr_warn("Unable to register clocksource\n"); return ret; } @@ -188,7 +190,7 @@ static int __init gic_clocksource_of_init(struct device_node *node) if (!mips_gic_present() || !node->parent || !of_device_is_compatible(node->parent, "mti,gic")) { - pr_warn("No DT definition for the mips gic driver\n"); + pr_warn("No DT definition\n"); return -ENXIO; } @@ -196,7 +198,7 @@ static int __init gic_clocksource_of_init(struct device_node *node) if (!IS_ERR(clk)) { ret = clk_prepare_enable(clk); if (ret < 0) { - pr_err("GIC failed to enable clock\n"); + pr_err("Failed to enable clock\n"); clk_put(clk); return ret; } @@ -204,12 +206,12 @@ static int __init gic_clocksource_of_init(struct device_node *node) gic_frequency = clk_get_rate(clk); } else if (of_property_read_u32(node, "clock-frequency", &gic_frequency)) { - pr_err("GIC frequency not specified.\n"); + pr_err("Frequency not specified\n"); return -EINVAL; } gic_timer_irq = irq_of_parse_and_map(node, 0); if (!gic_timer_irq) { - pr_err("GIC timer IRQ not specified.\n"); + pr_err("IRQ not specified\n"); return -EINVAL; } @@ -220,7 +222,7 @@ static int __init gic_clocksource_of_init(struct device_node *node) ret = gic_clockevent_init(); if (!ret && !IS_ERR(clk)) { if (clk_notifier_register(clk, &gic_clk_nb) < 0) - pr_warn("GIC: Unable to register clock notifier\n"); + pr_warn("Unable to register clock notifier\n"); } /* And finally start the counter */