From patchwork Fri May 25 09:49:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Thierry X-Patchwork-Id: 136819 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3356333lji; Fri, 25 May 2018 02:50:11 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqC95eb5lijGYWyO6jquOgwP3/QGNW7Hb52sjPt0hdiCKKgua3RobFYDm3gTwBAQO5683oC X-Received: by 2002:a62:20c7:: with SMTP id m68-v6mr1815334pfj.110.1527241811769; Fri, 25 May 2018 02:50:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527241811; cv=none; d=google.com; s=arc-20160816; b=FaRxAQlKiOOc7CBxh9kFz4IKhqFVG5/xX/XZIumaPhZdUisRLaO0UxAFbpwn3brnpZ c7vCXxJEJd7tfAi79NBMAUpCGNiHD5U6YMc5ClaQvf3tYI60zd6y+pRk9diPP0k9Xe0v VJ83VsO1qAIk1qHXRflQ+c5mfTX3UEHM3J3deexf4pWjbtat1AfyqHcSckwePZSwPOfW KYtc47j1Eh0jL1EHOaBq6eF5GNFP9k+lu1NqArd4d1d3h+UpguQg6WffX9VUcWD9vmQN xjPkqgTz2WUWQ5OcTk3rFHWIFKcW2xTj2gMrW+LWGXzmeHxmsuoDYPc7onR3bE55U+a7 zJOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=B8QTrVk7cLP6Z4kL0ycBpwn9R0+2E8MDQVJQpKWvlwc=; b=LMsT/mRfnCANzVEFp0l6aqKXMWWOLge0WvuYe2ua1ULeGr6qPR42UbrOsEotwKdnRG c4n9IrOy8DikcaNgc73ZuhxDBbNzWksGJY35HuPlbC67WRWZwWx0M3XlUfVKg7cbdO0v 9wd0NxvXs9ncBqR0Q58w/w/7niiR6i458vajqngM2v92+3I+1ffhNYrOlziR/+/RkBBO 9osjUVe6cK+dm6tpPbLK1xpaI9w13xfNi9dQKViX809P2m0R4IXjkNyz/NMohMadpgWD cKGfN7favSTTb26To53GgIB/poxjtnabZr49/nuDKxBTbSlc8I+tpRzgmM61Y1HjSDd0 6lwQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v31-v6si2722923plg.339.2018.05.25.02.50.11; Fri, 25 May 2018 02:50:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965893AbeEYJuJ (ORCPT + 30 others); Fri, 25 May 2018 05:50:09 -0400 Received: from foss.arm.com ([217.140.101.70]:57430 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965853AbeEYJuG (ORCPT ); Fri, 25 May 2018 05:50:06 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DEBF7169F; Fri, 25 May 2018 02:50:05 -0700 (PDT) Received: from e112298-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B88B03F25D; Fri, 25 May 2018 02:50:03 -0700 (PDT) From: Julien Thierry To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org, joel@joelfernandes.org, marc.zyngier@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, james.morse@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Thierry , Christoffer Dall , Suzuki K Poulose Subject: [PATCH v4 04/26] arm64: alternative: Apply alternatives early in boot process Date: Fri, 25 May 2018 10:49:10 +0100 Message-Id: <1527241772-48007-5-git-send-email-julien.thierry@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> References: <1527241772-48007-1-git-send-email-julien.thierry@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Daniel Thompson Currently alternatives are applied very late in the boot process (and a long time after we enable scheduling). Some alternative sequences, such as those that alter the way CPU context is stored, must be applied much earlier in the boot sequence. Introduce apply_boot_alternatives() to allow some alternatives to be applied immediately after we detect the CPU features of the boot CPU. Signed-off-by: Daniel Thompson [julien.thierry@arm.com: rename to fit new cpufeature framework better, apply BOOT_SCOPE feature early in boot] Signed-off-by: Julien Thierry Cc: Catalin Marinas Cc: Will Deacon Cc: Christoffer Dall Cc: Suzuki K Poulose --- arch/arm64/include/asm/alternative.h | 3 +-- arch/arm64/include/asm/cpufeature.h | 2 ++ arch/arm64/kernel/alternative.c | 30 +++++++++++++++++++++++++++--- arch/arm64/kernel/cpufeature.c | 5 +++++ arch/arm64/kernel/smp.c | 7 +++++++ 5 files changed, 42 insertions(+), 5 deletions(-) -- 1.9.1 diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h index a91933b..9fc938f 100644 --- a/arch/arm64/include/asm/alternative.h +++ b/arch/arm64/include/asm/alternative.h @@ -14,8 +14,6 @@ #include #include -extern int alternatives_applied; - struct alt_instr { s32 orig_offset; /* offset to original instruction */ s32 alt_offset; /* offset to replacement instruction */ @@ -27,6 +25,7 @@ struct alt_instr { typedef void (*alternative_cb_t)(struct alt_instr *alt, __le32 *origptr, __le32 *updptr, int nr_inst); +void __init apply_boot_alternatives(void); void __init apply_alternatives_all(void); void apply_alternatives(void *start, size_t length); diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 09b0f2a..19efe4e 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -359,6 +359,8 @@ static inline int cpucap_default_scope(const struct arm64_cpu_capabilities *cap) extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS]; extern struct static_key_false arm64_const_caps_ready; +extern unsigned long boot_capabilities; + bool this_cpu_has_cap(unsigned int cap); static inline bool cpu_have_feature(unsigned int num) diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c index 5c4bce4..3f540ff 100644 --- a/arch/arm64/kernel/alternative.c +++ b/arch/arm64/kernel/alternative.c @@ -122,7 +122,8 @@ static void patch_alternative(struct alt_instr *alt, } } -static void __apply_alternatives(void *alt_region, bool use_linear_alias) +static void __apply_alternatives(void *alt_region, bool use_linear_alias, + unsigned long feature_mask) { struct alt_instr *alt; struct alt_region *region = alt_region; @@ -132,6 +133,9 @@ static void __apply_alternatives(void *alt_region, bool use_linear_alias) for (alt = region->begin; alt < region->end; alt++) { int nr_inst; + if ((BIT(alt->cpufeature) & feature_mask) == 0) + continue; + /* Use ARM64_CB_PATCH as an unconditional patch */ if (alt->cpufeature < ARM64_CB_PATCH && !cpus_have_cap(alt->cpufeature)) @@ -178,7 +182,9 @@ static int __apply_alternatives_multi_stop(void *unused) isb(); } else { BUG_ON(alternatives_applied); - __apply_alternatives(®ion, true); + + __apply_alternatives(®ion, true, ~boot_capabilities); + /* Barriers provided by the cache flushing */ WRITE_ONCE(alternatives_applied, 1); } @@ -192,6 +198,24 @@ void __init apply_alternatives_all(void) stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask); } +/* + * This is called very early in the boot process (directly after we run + * a feature detect on the boot CPU). No need to worry about other CPUs + * here. + */ +void __init apply_boot_alternatives(void) +{ + struct alt_region region = { + .begin = (struct alt_instr *)__alt_instructions, + .end = (struct alt_instr *)__alt_instructions_end, + }; + + /* If called on non-boot cpu things could go wrong */ + WARN_ON(smp_processor_id() != 0); + + __apply_alternatives(®ion, true, boot_capabilities); +} + void apply_alternatives(void *start, size_t length) { struct alt_region region = { @@ -199,5 +223,5 @@ void apply_alternatives(void *start, size_t length) .end = start + length, }; - __apply_alternatives(®ion, false); + __apply_alternatives(®ion, false, -1); } diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index a3a5585d..7a4f602 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -52,6 +52,8 @@ DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS); EXPORT_SYMBOL(cpu_hwcaps); +unsigned long boot_capabilities; + /* * Flag to indicate if we have computed the system wide * capabilities based on the boot time active CPUs. This @@ -1370,6 +1372,9 @@ static void __update_cpu_capabilities(const struct arm64_cpu_capabilities *caps, if (!cpus_have_cap(caps->capability) && caps->desc) pr_info("%s %s\n", info, caps->desc); cpus_set_cap(caps->capability); + + if (scope_mask & SCOPE_BOOT_CPU) + __set_bit(caps->capability, &boot_capabilities); } } diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index f3e2e3a..b7fb909 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -410,6 +410,13 @@ void __init smp_prepare_boot_cpu(void) */ jump_label_init(); cpuinfo_store_boot_cpu(); + + /* + * We now know enough about the boot CPU to apply the + * alternatives that cannot wait until interrupt handling + * and/or scheduling is enabled. + */ + apply_boot_alternatives(); } static u64 __init of_get_cpu_mpidr(struct device_node *dn)