From patchwork Wed May 2 15:56:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 134841 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp846446lji; Wed, 2 May 2018 08:57:47 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpCiB5VmczD/VHBEQgq1es0WIufqXp4+MnHvhqOnveEblogSuuJWIbsBFoL0hHB91FN7QGb X-Received: by 10.98.245.139 with SMTP id b11mr19958740pfm.113.1525276667235; Wed, 02 May 2018 08:57:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525276667; cv=none; d=google.com; s=arc-20160816; b=hBaOcWtx3nAW+o3kHQDJLJGWXoZ+DEHKl+l4DWfDPMVqMxpeLbLL2Q9Z/sR8Xl/5v9 kfry1X6CoO7Q/U+/M1VSTm4FZWwAlVOrADLz2Aopm7KPV2K++5HHzyM3hIGtiG3vkl0+ tc7qR6c91vYupWU6P/1rEGgEUg2NkmcLNcnEzIpvdZOoD2PMeXAjyFKcXNaQ9WPT08sN tZmnJjTZZf5LcZyn3AbqfXPZs/hlmllaSxehYgwdIfsvoklkvtFKHHlB8JH957/V03GB CcQpfwIshoSyQhgc/xuna2gTKUpDtB8AQXYdDU+T8Q+dWPINSeiE6mIdlP17748oCqLM VVlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=ikstuvfQbYyVYzA3ueypD2ZNVcuOt+Jr2LAjG49Sqlk=; b=wk6sNbgYWSQ5PajyNilNISVqrYF/AQWNQOIwf/PsXGDVN7rdxbjYFcrS7IwvSWd0AC MQ1qtEWr7ORNBLt7Zz3hRrkdKjEOmwUKSIqQ4h0ajgwAgVQBK6A+k/mC1+4zzIbmU0dC xbEjWkhS3wDerwPxDeD6FHKb577B/MrDfJY7TbInkshIIEQcGntcNu6rtNABJPPyGmel mhjX5TyXcQMCRw4YcZKBwWRTtWDibJ1aiwt8yAomMdYSq8cS+f4X7ujunTyBI1sk2MXP UjYeSPrl6JrR6/9NMamPeIuovxjrbZ+JMt09kKdWDMko1hB+/LJo3Kgv8+NN7aLvjuEO rWuQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v24si12176480pfj.292.2018.05.02.08.57.46; Wed, 02 May 2018 08:57:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752079AbeEBP5o (ORCPT + 29 others); Wed, 2 May 2018 11:57:44 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:7219 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751891AbeEBP5m (ORCPT ); Wed, 2 May 2018 11:57:42 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 27B6998CBA406; Wed, 2 May 2018 23:57:27 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.361.1; Wed, 2 May 2018 23:57:19 +0800 From: John Garry To: , CC: , , , John Garry Subject: [PATCH 10/11] scsi: hisi_sas: add readl poll timeout helper wrappers Date: Wed, 2 May 2018 23:56:33 +0800 Message-ID: <1525276594-92173-11-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525276594-92173-1-git-send-email-john.garry@huawei.com> References: <1525276594-92173-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org It is common to use readl poll timeout helpers in the driver, so create custom wrappers. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) -- 1.9.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index d6e705f..28bb71e 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -394,6 +394,20 @@ static u32 hisi_sas_phy_read32(struct hisi_hba *hisi_hba, return readl(regs); } +#define hisi_sas_read32_poll_timeout(off, val, cond, delay_us, \ + timeout_us) \ +({ \ + void __iomem *regs = hisi_hba->regs + off; \ + readl_poll_timeout(regs, val, cond, delay_us, timeout_us); \ +}) + +#define hisi_sas_read32_poll_timeout_atomic(off, val, cond, delay_us, \ + timeout_us) \ +({ \ + void __iomem *regs = hisi_hba->regs + off; \ + readl_poll_timeout_atomic(regs, val, cond, delay_us, timeout_us);\ +}) + static void init_reg_v3_hw(struct hisi_hba *hisi_hba) { struct pci_dev *pdev = hisi_hba->pci_dev; @@ -684,8 +698,8 @@ static int reset_hw_v3_hw(struct hisi_hba *hisi_hba) udelay(50); /* Ensure axi bus idle */ - ret = readl_poll_timeout(hisi_hba->regs + AXI_CFG, val, !val, - 20000, 1000000); + ret = hisi_sas_read32_poll_timeout(AXI_CFG, val, !val, + 20000, 1000000); if (ret) { dev_err(dev, "axi bus is not idle, ret = %d!\n", ret); return -EIO; @@ -1977,8 +1991,9 @@ static int soft_reset_v3_hw(struct hisi_hba *hisi_hba) hisi_sas_write32(hisi_hba, AXI_MASTER_CFG_BASE + AM_CTRL_GLOBAL, 0x1); /* wait until bus idle */ - rc = readl_poll_timeout(hisi_hba->regs + AXI_MASTER_CFG_BASE + - AM_CURR_TRANS_RETURN, status, status == 0x3, 10, 100); + rc = hisi_sas_read32_poll_timeout(AXI_MASTER_CFG_BASE + + AM_CURR_TRANS_RETURN, status, + status == 0x3, 10, 100); if (rc) { dev_err(dev, "axi bus is not idle, rc = %d\n", rc); return rc; @@ -2396,8 +2411,9 @@ static int hisi_sas_v3_suspend(struct pci_dev *pdev, pm_message_t state) AM_CTRL_GLOBAL, reg_val); /* wait until bus idle */ - rc = readl_poll_timeout(hisi_hba->regs + AXI_MASTER_CFG_BASE + - AM_CURR_TRANS_RETURN, status, status == 0x3, 10, 100); + rc = hisi_sas_read32_poll_timeout(AXI_MASTER_CFG_BASE + + AM_CURR_TRANS_RETURN, status, + status == 0x3, 10, 100); if (rc) { dev_err(dev, "axi bus is not idle, rc = %d\n", rc); clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);