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[209.132.180.67]) by mx.google.com with ESMTP id 91-v6si503995plf.78.2018.04.03.06.01.50; Tue, 03 Apr 2018 06:01:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PdtQhwnN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932214AbeDCNBq (ORCPT + 29 others); Tue, 3 Apr 2018 09:01:46 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:38338 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932130AbeDCNBp (ORCPT ); Tue, 3 Apr 2018 09:01:45 -0400 Received: by mail-wm0-f68.google.com with SMTP id i3so11258282wmf.3 for ; Tue, 03 Apr 2018 06:01:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pDcP4ElhtzDFczJG+YXCmWM3XKWZyX2bCfMk6R4DPCw=; b=PdtQhwnNesP0fYEk6cjJxW68SJyJbkievvAs9zjY+miuWoGgAwGAzZgOZDAPKv9/f1 v0Ktc+jQg5JEYkKM+e9q3Vket63z52K8NxY3LKSkig2lD3Kw5pTCtIoGrbAsGnyvV7yL 9pTbAB1oLS2sFGyVtgJvRZ7jt3o2ZAK8oNHKE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pDcP4ElhtzDFczJG+YXCmWM3XKWZyX2bCfMk6R4DPCw=; b=PNeoemxCVy6+lFtyt1jNYWzuDQR6zyLpMWn+v8DFDFycMOd/rsTIvzkRTK8sHVcaLb RzhG37QrzxB3frSDgx/ygpiC7Jap+kBWaCuqZ18DFYRxM5ho5kH77qnvtqm8DIRN3tJo AnvghGPtNNNJWOezuVWvW+UzuB+Vq8aEyYMdIb+LlJHdAN5lj1DrqUGrx2bAsosQBQeU fDro2U80lk34Sdtrg1OIU7iLFhsXhMTzCZjFxtdK1/g0u0Js/PgguDxKMtdwTXf6tbZF OuMX338EiDTdXBYsNiIkLahF2bmNU5X/XCVQFW8d6An/O1Doy7EX79ueyDlkf31Q96hF Aonw== X-Gm-Message-State: ALQs6tBfsO3pTiEf1W7OzBwyuxrnIRJwi0nibvGUTimiZyJ3OBx04kSM 2GdiQWc7u2LEwARNKxysliG/LA== X-Received: by 10.28.71.77 with SMTP id u74mr4489370wma.149.1522760503751; Tue, 03 Apr 2018 06:01:43 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:2c10:b60f:70d4:5b8c]) by smtp.gmail.com with ESMTPSA id j76sm857047wmd.17.2018.04.03.06.01.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 03 Apr 2018 06:01:43 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Tomer Maimon , Rob Herring , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 1/6] dt-binding: timer: document NPCM7xx timer DT bindings Date: Tue, 3 Apr 2018 15:00:25 +0200 Message-Id: <1522760432-32048-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tomer Maimon Added device tree binding documentation for Nuvoton NPCM7xx timer. Signed-off-by: Tomer Maimon Acked-by: Rob Herring Reviewed-by: Brendan Higgins Signed-off-by: Daniel Lezcano --- .../bindings/timer/nuvoton,npcm7xx-timer.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt new file mode 100644 index 0000000..ea22dfe --- /dev/null +++ b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt @@ -0,0 +1,21 @@ +Nuvoton NPCM7xx timer + +Nuvoton NPCM7xx have three timer modules, each timer module provides five 24-bit +timer counters. + +Required properties: +- compatible : "nuvoton,npcm750-timer" for Poleg NPCM750. +- reg : Offset and length of the register set for the device. +- interrupts : Contain the timer interrupt with flags for + falling edge. +- clocks : phandle of timer reference clock (usually a 25 MHz clock). + +Example: + +timer@f0008000 { + compatible = "nuvoton,npcm750-timer"; + interrupts = ; + reg = <0xf0008000 0x50>; + clocks = <&clk NPCM7XX_CLK_TIMER>; +}; +