From patchwork Wed Feb 28 03:56:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Shi X-Patchwork-Id: 129908 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp569352lja; Tue, 27 Feb 2018 20:00:32 -0800 (PST) X-Google-Smtp-Source: AG47ELt1MgH/6nSIzwugWDpdhccBLGmlBuZxZbGoI/CH7JKKAB9YsoFxQ0npEy3RzHdP564hf6Jo X-Received: by 10.98.69.196 with SMTP id n65mr3796841pfi.29.1519790432407; Tue, 27 Feb 2018 20:00:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519790432; cv=none; d=google.com; s=arc-20160816; b=JoNkimZl266DEAE8gcGobAygyDob4XowcmaYmLBlHotvPrt3Oba2BrL+bp3ljQfs2d 1iboytEZi4wBEe9AIyhnfN7Qrp7Q0Osip+XLZ/rQQVNTN3tM4LRQ+XMpGq25UVBxPGY6 j7YOEIWugByZ4AUFLNyjCF/BAWH52r7WpKMVdOXFJ3ihBzoQbohnJ07dvujl+NccrZc1 ZmXLzo2/TF5mSo/sUVZFW0lgyg1PwcSQE/Hi1CghueBiiIf8XfGBrAPJ7RsTi9S6J69x lUK2EAJtstiXHk7c+ZyDCF3p4WD6NXY4Az7Sqpj5kdH5UlJUwx49W7PR8tLPYSasixV6 NFIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=JC5B9Ogq58f9r18lYBOpTdl94tTzOD0MxFQZk4nXoSI=; b=oOQV5WvqeJq516z1Tfr+VC7/Xlubb93RTsRAKDz45c+gifwGJAxvR9lPP4g4UFn6qt hC+munfRtGLUMgr/EBO2uG3wX4lKzjpQ5CZxQjdh2BQq9ntrTzWk/Yf+69IKkd1Lwgc3 xr+ACdPCdLD0WdndNsXNg3lroh/g1UvzN8lroktDsJo61xasrerkbUVMQBu6/kjl4Weu 3rHXq1qyuxw7pQFeCtlDfGcoLNTpeP6VAvtlxTzFL+42zvhvPfpHlv7l5ie2zQpuMg9y /dE4eWx5N5aBJ7G4snET0t2Rf535b7UykMMUnNXTDG7VUn1SH4hz3YDMuRvBexw/ex// B6rg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZrT0fHbE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g17-v6si571790plo.357.2018.02.27.20.00.31; Tue, 27 Feb 2018 20:00:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ZrT0fHbE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932260AbeB1EAa (ORCPT + 28 others); Tue, 27 Feb 2018 23:00:30 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:40728 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752339AbeB1EA0 (ORCPT ); Tue, 27 Feb 2018 23:00:26 -0500 Received: by mail-pl0-f67.google.com with SMTP id i6-v6so772801plt.7 for ; Tue, 27 Feb 2018 20:00:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JC5B9Ogq58f9r18lYBOpTdl94tTzOD0MxFQZk4nXoSI=; b=ZrT0fHbEFbb7oYRmH3KIm9/AALDvmwozkFQKNAEaeKzOMxlQBWeT7OyNwpY4W8LKq5 IBUDK74MDFUfIV7zCB82GqeDQwQ00EgZovJxeI6x50uvefK5G6XFjav4tRaD0QO3FR6d TkemZUVjyExhuLszuBiE46WHvVcP9c5yHxJ6c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JC5B9Ogq58f9r18lYBOpTdl94tTzOD0MxFQZk4nXoSI=; b=mQyaUoMAYpUho/Q1A3dkXTleWPe9vaAAgAWSPvOA8Kg5QUvBLtTGnK5Y3/jtuxMA7D GmwKLolJHt2LpWIV42nv6bUfk+ZNA1pA0y/h0CuCYjx06aV2R4QMeWJxcIe2zmpJ+YU8 VaDqpxhfm3rOfGmAaVgarkwqHw1IJFiTGZnj6tvlMSLTTTR2flEEm5h9bWvg/HeFkPmC /4fAZMKdG+1BDG+2qUltWzEaLFFqZBKYMDKUpXEwlIqH8fdKSHa3lyMT+9+yuoHH83WE RaghQ99u4NteI23o1Jh92pSLWoqn5h7PcGfyrjfx7xfEcW8GmlOgDyBt/ch9b1Y75A9V m/Rw== X-Gm-Message-State: APf1xPAQp3zVU4l/P/r6zDuOZx3pRYOEpinQl2dkHrzCVRUEtVQXX5tQ zUVFv9ZyBW+XGIQ9Y5tG6PX5ZA== X-Received: by 2002:a17:902:f81:: with SMTP id 1-v6mr16027770plz.265.1519790425841; Tue, 27 Feb 2018 20:00:25 -0800 (PST) Received: from localhost.localdomain (176.122.172.82.16clouds.com. [176.122.172.82]) by smtp.gmail.com with ESMTPSA id q17sm739911pgt.7.2018.02.27.20.00.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 27 Feb 2018 20:00:25 -0800 (PST) From: Alex Shi To: Marc Zyngier , Will Deacon , Ard Biesheuvel , Catalin Marinas , stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Jayachandran C , Alex Shi Subject: [PATCH 24/29] arm64: Turn on KPTI only on CPUs that need it Date: Wed, 28 Feb 2018 11:56:46 +0800 Message-Id: <1519790211-16582-25-git-send-email-alex.shi@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519790211-16582-1-git-send-email-alex.shi@linaro.org> References: <1519790211-16582-1-git-send-email-alex.shi@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jayachandran C commit 0ba2e29c7fc1 upstream. Whitelist Broadcom Vulcan/Cavium ThunderX2 processors in unmap_kernel_at_el0(). These CPUs are not vulnerable to CVE-2017-5754 and do not need KPTI when KASLR is off. Acked-by: Will Deacon Signed-off-by: Jayachandran C Signed-off-by: Catalin Marinas Signed-off-by: Will Deacon Signed-off-by: Alex Shi --- arch/arm64/kernel/cpufeature.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 6200b81..e62583d 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -766,6 +766,13 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) return true; + /* Don't force KPTI for CPUs that are not vulnerable */ + switch (read_cpuid_id() & MIDR_CPU_MODEL_MASK) { + case MIDR_CAVIUM_THUNDERX2: + case MIDR_BRCM_VULCAN: + return false; + } + /* Defer to CPU feature registers */ return !cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_CSV3_SHIFT);