From patchwork Mon Feb 19 17:48:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 128831 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3720934ljc; Mon, 19 Feb 2018 09:00:05 -0800 (PST) X-Google-Smtp-Source: AH8x225z84mm9cPu/Kx6tbmnEpyIFJXXl6axfZCjwVOIC5hKYc1YzA9+yae76R7wEQwLiS4RUWmw X-Received: by 10.101.64.204 with SMTP id u12mr12888711pgp.280.1519059604863; Mon, 19 Feb 2018 09:00:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519059604; cv=none; d=google.com; s=arc-20160816; b=P0EM6RZ8ni9OkjLEU9ENBcDW9eytpSRzrZslBKburZJwe84cuBrYRC4EkRLeK4vaac aKDsdWfZEEg4fiz6zkvVZ2IB5tu2NfqjbDr1QINC8yRQXtswbTsxMFsFA5IwNUsXTDKQ HV7Zg6RTB9wwh5WlpUo7ipYKxW+qV13bRcF+AVQNwhSHhydNoUY4aIGXIoiRPFfovBnE WFxewzjnib2jX4zaRdAvCQn2Wd8AlFcRjwqiNsl4sTLj7NFgYmDoQdqOpR1zQ/ZPm31s 9+twJBmVIbrwS/l7xEylOmqM6LfH4EUPsCj0J46PeKUunKMxURewDObbO1mMyAaQ+RL8 aUiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=X4FetzJZMMi+vqJJfcSv7XKiXogm7ceytoO8eWzu69k=; b=EiiR5GJCkffGIZpvxjf52Ok/8+aXyiH8bPDdlCgQNkXwTCMZGRyQZG6rj9QeNbsSgj /ml6T3tZPfW4a2UFJJuohsiow4YwSLFT8GLWNmLfVwPBmW7EqE3kwK53ihconn+IRqyC bGwyg2KDFeCwMxum3elRQ4z5UZHrBiEMbPGCDyOEVZKAJPCNa37/C3TNTfFFcUS1w3E/ EEfCltKFmNPfoIWSvg/j79r1Q5Hgw6up8SoXIKWtkb3db+qecDjQXmC5T7wkfDsFvPc0 +x0n2y6wkhhWtDymE3UQgfMuXoznwyhw2h1WJTW5eHZpZPdghlQ/feJGK/bFMPV3kJ/H BqTw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 69si8060296pfv.15.2018.02.19.09.00.04; Mon, 19 Feb 2018 09:00:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753465AbeBSQ7r (ORCPT + 28 others); Mon, 19 Feb 2018 11:59:47 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:45703 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753240AbeBSQ5E (ORCPT ); Mon, 19 Feb 2018 11:57:04 -0500 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id BE08452200795; Tue, 20 Feb 2018 00:56:47 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.361.1; Tue, 20 Feb 2018 00:56:41 +0800 From: John Garry To: , , , , , , , , , , , , CC: , , , , , , , , , Subject: [PATCH v14 4/9] PCI: Apply the new generic I/O management on PCI IO hosts Date: Tue, 20 Feb 2018 01:48:35 +0800 Message-ID: <1519062520-198902-5-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1519062520-198902-1-git-send-email-john.garry@huawei.com> References: <1519062520-198902-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhichang Yuan After introducing the new generic I/O space management in logic pio, the original PCI MMIO relevant helpers need to be updated based on the new interfaces. This patch adapts the corresponding code to match the changes introduced by logic pio. Signed-off-by: Zhichang Yuan Signed-off-by: Gabriele Paoloni Signed-off-by: Arnd Bergmann #earlier draft Acked-by: Bjorn Helgaas --- drivers/pci/pci.c | 92 +++++++++--------------------------------------- include/asm-generic/io.h | 2 +- 2 files changed, 18 insertions(+), 76 deletions(-) -- 1.9.1 diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 07290a3..9e08751 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -3440,17 +3441,6 @@ int pci_request_regions_exclusive(struct pci_dev *pdev, const char *res_name) } EXPORT_SYMBOL(pci_request_regions_exclusive); -#ifdef PCI_IOBASE -struct io_range { - struct list_head list; - phys_addr_t start; - resource_size_t size; -}; - -static LIST_HEAD(io_range_list); -static DEFINE_SPINLOCK(io_range_lock); -#endif - /* * Record the PCI IO range (expressed as CPU physical address + size). * Return a negative value if an error has occured, zero otherwise @@ -3458,51 +3448,28 @@ struct io_range { int pci_register_io_range(struct fwnode_handle *fwnode, phys_addr_t addr, resource_size_t size) { - int err = 0; - + int ret = 0; #ifdef PCI_IOBASE - struct io_range *range; - resource_size_t allocated_size = 0; - - /* check if the range hasn't been previously recorded */ - spin_lock(&io_range_lock); - list_for_each_entry(range, &io_range_list, list) { - if (addr >= range->start && addr + size <= range->start + size) { - /* range already registered, bail out */ - goto end_register; - } - allocated_size += range->size; - } + struct logic_pio_hwaddr *range; - /* range not registed yet, check for available space */ - if (allocated_size + size - 1 > IO_SPACE_LIMIT) { - /* if it's too big check if 64K space can be reserved */ - if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) { - err = -E2BIG; - goto end_register; - } - - size = SZ_64K; - pr_warn("Requested IO range too big, new size set to 64K\n"); - } + if (!size || addr + size < addr) + return -EINVAL; - /* add the range to the list */ range = kzalloc(sizeof(*range), GFP_ATOMIC); - if (!range) { - err = -ENOMEM; - goto end_register; - } + if (!range) + return -ENOMEM; - range->start = addr; + range->fwnode = fwnode; range->size = size; + range->hw_start = addr; + range->flags = PIO_CPU_MMIO; - list_add_tail(&range->list, &io_range_list); - -end_register: - spin_unlock(&io_range_lock); + ret = logic_pio_register_range(range); + if (ret) + kfree(range); #endif - return err; + return ret; } phys_addr_t pci_pio_to_address(unsigned long pio) @@ -3510,21 +3477,10 @@ phys_addr_t pci_pio_to_address(unsigned long pio) phys_addr_t address = (phys_addr_t)OF_BAD_ADDR; #ifdef PCI_IOBASE - struct io_range *range; - resource_size_t allocated_size = 0; - - if (pio > IO_SPACE_LIMIT) + if (pio >= MMIO_UPPER_LIMIT) return address; - spin_lock(&io_range_lock); - list_for_each_entry(range, &io_range_list, list) { - if (pio >= allocated_size && pio < allocated_size + range->size) { - address = range->start + pio - allocated_size; - break; - } - allocated_size += range->size; - } - spin_unlock(&io_range_lock); + address = logic_pio_to_hwaddr(pio); #endif return address; @@ -3533,21 +3489,7 @@ phys_addr_t pci_pio_to_address(unsigned long pio) unsigned long __weak pci_address_to_pio(phys_addr_t address) { #ifdef PCI_IOBASE - struct io_range *res; - resource_size_t offset = 0; - unsigned long addr = -1; - - spin_lock(&io_range_lock); - list_for_each_entry(res, &io_range_list, list) { - if (address >= res->start && address < res->start + res->size) { - addr = address - res->start + offset; - break; - } - offset += res->size; - } - spin_unlock(&io_range_lock); - - return addr; + return logic_pio_trans_cpuaddr(address); #else if (address > IO_SPACE_LIMIT) return (unsigned long)-1; diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index b7996a79..5a59931 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h @@ -901,7 +901,7 @@ static inline void iounmap(void __iomem *addr) #define ioport_map ioport_map static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) { - return PCI_IOBASE + (port & IO_SPACE_LIMIT); + return PCI_IOBASE + (port & MMIO_UPPER_LIMIT); } #endif