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[209.132.180.67]) by mx.google.com with ESMTP id c15si8399958pfm.268.2018.01.08.05.30.28; Mon, 08 Jan 2018 05:30:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SjDyX058; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933464AbeAHNa0 (ORCPT + 28 others); Mon, 8 Jan 2018 08:30:26 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:46567 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933419AbeAHN36 (ORCPT ); Mon, 8 Jan 2018 08:29:58 -0500 Received: by mail-wm0-f68.google.com with SMTP id r78so14191414wme.5 for ; Mon, 08 Jan 2018 05:29:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=li+kAXda59gUq6am3TC/ClLS6dgrh+RZG4z+TgzncBc=; b=SjDyX058YqfvNhbGuC80VM0WEgfK0M7hgKS8uN26SjQT6ZhNrLs06JJC2/iTNWJQJz Iz6MWd1jDOIJUNVDto98wl7EIA9uBdduP14kYe16OrbQJD/NO+4V2846hllqSbsbMXXx 3mD8fz6WLdPPTBO30rzE6UBOgxlgOnCLtDmcM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=li+kAXda59gUq6am3TC/ClLS6dgrh+RZG4z+TgzncBc=; b=cyL+VFw8m31FjFYLhD++ot3ztRjQE6UTJlalnuAi37+V72VqAqFrXfjpgRBS2+Zs/a eJe9Qznr0qJ9LEJDu2s6PblWlTAycKhWQxMirvH5Lkkob669JAfYpSoskKSwl/IAN7gk X0ZmnInzvZQEX96XrFXuBE7KO0qTy1upAFTLkZ3myZJiHbt4OFtRxifDTcBMbfOe18uz zUC4QwLOWG7wpybIINhTK75wiLguXeao5FLAirxy6v3310tjtL/ytSfF1QV9JYk1i9YG +0+NP46MT4JHv+I6xgKA65XXPhchKl2yme4Vi05lcN6BqizfsWRtSQETG1lWn5Y8y8YG 1zVA== X-Gm-Message-State: AKGB3mL+41a2AL3t3EnoNZXsMzLCHyGp+NqMc3bq4taD3+iojSAnf4eq IkTNRPPg+PL98mMBT21rIIRNbA== X-Received: by 10.28.51.70 with SMTP id z67mr9624694wmz.78.1515418197047; Mon, 08 Jan 2018 05:29:57 -0800 (PST) Received: from mai.lan ([2001:41d0:fe90:b800:312a:53a5:1bef:6622]) by smtp.gmail.com with ESMTPSA id q196sm14354222wmb.22.2018.01.08.05.29.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 Jan 2018 05:29:56 -0800 (PST) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Benjamin Gaignard , Maxime Coquelin , Alexandre Torgue , linux-arm-kernel@lists.infradead.org (moderated list:ARM/STM32 ARCHITECTURE) Subject: [PATCH 19/20] clocksource/drivers/stm32: Add the timer delay Date: Mon, 8 Jan 2018 14:28:58 +0100 Message-Id: <1515418139-23276-19-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515418139-23276-1-git-send-email-daniel.lezcano@linaro.org> References: <1bbaef2e-4080-3f54-7db3-a8989acfd691@free.fr> <1515418139-23276-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the timer delay, that saves us ~90ms of boot time. Signed-off-by: Daniel Lezcano Tested-by: Benjamin Gaignard Acked-by: Benjamin Gaignard --- drivers/clocksource/timer-stm32.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.7.4 diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c index 4634f4d..dcf8445 100644 --- a/drivers/clocksource/timer-stm32.c +++ b/drivers/clocksource/timer-stm32.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -88,6 +89,13 @@ static u64 notrace stm32_read_sched_clock(void) return readl_relaxed(stm32_timer_cnt); } +static struct delay_timer stm32_timer_delay; + +static unsigned long stm32_read_delay(void) +{ + return readl_relaxed(stm32_timer_cnt); +} + static void stm32_clock_event_disable(struct timer_of *to) { writel_relaxed(0, timer_of_base(to) + TIM_DIER); @@ -230,6 +238,11 @@ static int __init stm32_clocksource_init(struct timer_of *to) stm32_timer_cnt = timer_of_base(to) + TIM_CNT; sched_clock_register(stm32_read_sched_clock, bits, timer_of_rate(to)); pr_info("%s: STM32 sched_clock registered\n", name); + + stm32_timer_delay.read_current_timer = stm32_read_delay; + stm32_timer_delay.freq = timer_of_rate(to); + register_current_timer_delay(&stm32_timer_delay); + pr_info("%s: STM32 delay timer registered\n", name); } return clocksource_mmio_init(timer_of_base(to) + TIM_CNT, name,