From patchwork Mon Jan 8 13:28:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 123718 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2729059qgn; Mon, 8 Jan 2018 05:31:35 -0800 (PST) X-Google-Smtp-Source: ACJfBosaNqSGo0Vq4E5kHVSuCCZC0s5zuRm4cudqCPIV/MpSXdnmzRhNvqTk+ESOwiP1KWl/kB01 X-Received: by 10.99.151.81 with SMTP id d17mr9563167pgo.219.1515418295542; Mon, 08 Jan 2018 05:31:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515418295; cv=none; d=google.com; s=arc-20160816; b=EuqV3ujtn5i90ITZid4jUYdjbVM5RgrgdZO80nuAT8Zk86TtOvOuXYHlzrD8ektBM4 Hx+m9dKPRjlRud2NxhWmZ2z7Vn6PR6B2KT30McoM2vgu5g7buWulE7ojriSRBk9z/his IsiFh/flLkxblO0nj2ACb/PXgKBplVjh+d1Zb1ZR6pVe0dqsIdPFSa1vhA4O7O/0fu39 z87kIqqTfDrmjBaPmKschhoVp2bUcJHHnhY227CinOHUyY6Yi26H5P7FMGKQ/NR+CKj3 LgXEX0jR43ONU9w0vrX/djUTW0LaMIgwaYdE/stvcLFmMUdXaGX4YzrAMGQo0LZ/r+0O tTig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=C2u3XKqf0LKFXaORJ7Yri2u/Iml2MgQlBrxLcnQJAR4=; b=dFzh31uk9IHrmX5bmIPjJypb3jthuuMP9M0nUcxG7hNbvLAADbdk9OxnT3e0Swr4Ni StfwXw/yixDNaCe0KYiHFokYdZrYPELoc4ZRbUFRwFlVSYnrS2Q6920cQkkdKI9du5ZD K8xeYejwX9NXyVkv/A3fVxAEHu1m/W6UWzklP9D5/MYQZtEP7EeX5ivcg94tNtkoJNvA oeqlYUOj8N7dPHfll3Ir2kAkKXcD2QMEim14PbtVEnLU14danovvpre1H1siq1qXVnjx YR+rEwLQQnqcoavrV1H6y0kxCFZN551iePeDy3WAXrXB5Pev9zSEq5J2prfJTBkAkD8r rwPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AqFnQKvx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d25si114322pfl.211.2018.01.08.05.31.35; Mon, 08 Jan 2018 05:31:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AqFnQKvx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933508AbeAHNbd (ORCPT + 28 others); Mon, 8 Jan 2018 08:31:33 -0500 Received: from mail-wm0-f68.google.com ([74.125.82.68]:44441 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932821AbeAHN3u (ORCPT ); Mon, 8 Jan 2018 08:29:50 -0500 Received: by mail-wm0-f68.google.com with SMTP id t8so14098588wmc.3 for ; Mon, 08 Jan 2018 05:29:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=C2u3XKqf0LKFXaORJ7Yri2u/Iml2MgQlBrxLcnQJAR4=; b=AqFnQKvxKySnYo1Nz9ftr8QL6jkLvAYyPclbCKBkUZLUUmyMHogOD4RgnvB3u/zwXr crlz4qzn5y67hd6T5UY4cyec9Jt5Cp2ExD1ZXtNAKKCKWu1KixnkEMXg+SeNpWl5MGya 2GhWAqUUL+iK1zt4DDXMmlZVEaENYdrZgbwiU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=C2u3XKqf0LKFXaORJ7Yri2u/Iml2MgQlBrxLcnQJAR4=; b=bh0on1iyRx/OVTz2umgq6Da/ebq8TND9p0Zx+H7p3wpdqH+Sbr4XM9Ij539sqPbw07 luuyogPe/wSPgq3fSCP84SdJKs+ge1vHMjHzhfig8OE+vNjMBnR2uAt019vhc2CKQLNp n+OvggLCuBaaCqe8OgMtRGnkQ8EjUQ3TUgsPdTAOpO8Pja+KLkj25uNQJH8qV/OhflDm 5igLYmfZbCAYBJAPQCLBrJ/6JpBHDmW6IXMf/IE/SM2pvrZ9bRQ7gTiZEz7VOnMqzUIX 182N+fi8WTGleEtX7reMTIRwie41awCx7mntgaAWqQ472vVH9u5u+TBId7b6pkmB26Nr TaDw== X-Gm-Message-State: AKGB3mK3+inciLCqLZXPCN2r1a7SpL+YGA1geP+uqM+Cs4C4KYEu0A1m UWXQK+itlRXffmzGhhfXDBCUQw== X-Received: by 10.28.149.131 with SMTP id x125mr8737221wmd.129.1515418189549; Mon, 08 Jan 2018 05:29:49 -0800 (PST) Received: from mai.lan ([2001:41d0:fe90:b800:312a:53a5:1bef:6622]) by smtp.gmail.com with ESMTPSA id q196sm14354222wmb.22.2018.01.08.05.29.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 Jan 2018 05:29:48 -0800 (PST) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Benjamin Gaignard , Maxime Coquelin , Alexandre Torgue , linux-arm-kernel@lists.infradead.org (moderated list:ARM/STM32 ARCHITECTURE) Subject: [PATCH 15/20] clocksource/drivers/stm32: Compute a prescaler value with a targeted rate Date: Mon, 8 Jan 2018 14:28:54 +0100 Message-Id: <1515418139-23276-15-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515418139-23276-1-git-send-email-daniel.lezcano@linaro.org> References: <1bbaef2e-4080-3f54-7db3-a8989acfd691@free.fr> <1515418139-23276-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Benjamin Gaignard The prescaler value is arbitrarily set to 1024 without any regard to the timer frequency. For 32bits timers, there is no need to set a prescaler value as they wrap in an acceptable interval and give the opportunity to have precise timers on this platform. However, for 16bits timers a prescaler value is needed if we don't want to wrap too often per second which is unefficient and adds more and more error margin. With a targeted clock of 10MHz, the 16bits are precise enough whatever the timer frequency is as we will compute the prescaler. Signed-off-by: Benjamin Gaignard Signed-off-by: Daniel Lezcano Tested-by: Benjamin Gaignard Acked-by: Benjamin Gaignard --- drivers/clocksource/timer-stm32.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c index 862134e..ac55896 100644 --- a/drivers/clocksource/timer-stm32.c +++ b/drivers/clocksource/timer-stm32.c @@ -37,6 +37,9 @@ #define TIM_EGR_UG BIT(0) +#define TIM_PSC_MAX USHRT_MAX +#define TIM_PSC_CLKRATE 10000 + static int stm32_clock_event_shutdown(struct clock_event_device *clkevt) { struct timer_of *to = to_timer_of(clkevt); @@ -116,7 +119,14 @@ static void __init stm32_clockevent_init(struct timer_of *to) prescaler = 1; to->clkevt.rating = 250; } else { - prescaler = 1024; + prescaler = DIV_ROUND_CLOSEST(timer_of_rate(to), + TIM_PSC_CLKRATE); + /* + * The prescaler register is an u16, the variable + * can't be greater than TIM_PSC_MAX, let's cap it in + * this case. + */ + prescaler = prescaler < TIM_PSC_MAX ? prescaler : TIM_PSC_MAX; to->clkevt.rating = 100; } writel_relaxed(0, timer_of_base(to) + TIM_ARR);