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[209.132.180.67]) by mx.google.com with ESMTP id i186si2288929pfg.286.2018.01.04.04.52.05; Thu, 04 Jan 2018 04:52:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FCY/dBky; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753093AbeADMwC (ORCPT + 27 others); Thu, 4 Jan 2018 07:52:02 -0500 Received: from mail-wr0-f195.google.com ([209.85.128.195]:35260 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752949AbeADMvf (ORCPT ); Thu, 4 Jan 2018 07:51:35 -0500 Received: by mail-wr0-f195.google.com with SMTP id l19so1397874wrc.2 for ; Thu, 04 Jan 2018 04:51:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SW+UXwe3FOrgHdI3u4Vqm7du18NRC6xC7iv/sadwviw=; b=FCY/dBky1d/tYFjy2vleroFTBGc/469v/Y80muAuhcPMrZjoNNqAcMQN7wmrDfhUew HlC8Ycxk91ump8zxPqeqV5fsqCo7ubJhknW9Nc+T3V0RuoQSq6bMe+7o80SIlTYcUICm fxgKdwUHJSYLOyRPFDFKKhglnrNsD8+kofmVg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SW+UXwe3FOrgHdI3u4Vqm7du18NRC6xC7iv/sadwviw=; b=YyuZ/15VR1VDR8wOD/Njlf2lAu7t+MVRYhUqBtv2UkIdOfTQCtURbOAHgBFXEAJilE 0l47wJZj7rcknkpLToU1LQvSQnrclH9z8usgmFtnmaplfJCqVtXwCb3uz0blnOuvu8Tn +PSaN9ar60P2UmxLxtppA2Q55CnrBYmrBLYniZotWNJocQtTNYnk3BLjhy6uCeEAHa6q ek/xvdU3bAp0uP8ji3JIPsfmfZRS9TTSWc/+Kwk53zFZXb0FlksPcKIKSzdndsE0bcUF vK9TyFUFgRrBIpf0HbNfhzxE2fuGWxeXJkKKmq7ckfDxkmcZ/10FgOkpVrmIk5l/vZ7m gTfw== X-Gm-Message-State: AKGB3mKT9283cpSSFOPOQXsNBZBqsfQRYXEMZUeWZUgXDV/4R2TvlKf5 DOvm56Cd/dqO7/0VGQ6sEQXwXg== X-Received: by 10.223.169.4 with SMTP id u4mr1020472wrc.185.1515070294418; Thu, 04 Jan 2018 04:51:34 -0800 (PST) Received: from mai.lan ([2001:41d0:fe90:b800:c10d:405d:d60:60bb]) by smtp.gmail.com with ESMTPSA id d71sm3668348wma.7.2018.01.04.04.51.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Jan 2018 04:51:33 -0800 (PST) From: Daniel Lezcano To: daniel.lezcano@linaro.org, tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, benjamin.gaignard@linaro.org, Maxime Coquelin , Alexandre Torgue , linux-arm-kernel@lists.infradead.org (moderated list:ARM/STM32 ARCHITECTURE) Subject: [PATCH 11/12] clocksource/drivers/stm32: Add the timer delay Date: Thu, 4 Jan 2018 13:50:27 +0100 Message-Id: <1515070228-10481-12-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515070228-10481-1-git-send-email-daniel.lezcano@linaro.org> References: <1515070228-10481-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the timer delay, that saves us ~90ms of boot time. Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-stm32.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.7.4 diff --git a/drivers/clocksource/timer-stm32.c b/drivers/clocksource/timer-stm32.c index 4634f4d..dcf8445 100644 --- a/drivers/clocksource/timer-stm32.c +++ b/drivers/clocksource/timer-stm32.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -88,6 +89,13 @@ static u64 notrace stm32_read_sched_clock(void) return readl_relaxed(stm32_timer_cnt); } +static struct delay_timer stm32_timer_delay; + +static unsigned long stm32_read_delay(void) +{ + return readl_relaxed(stm32_timer_cnt); +} + static void stm32_clock_event_disable(struct timer_of *to) { writel_relaxed(0, timer_of_base(to) + TIM_DIER); @@ -230,6 +238,11 @@ static int __init stm32_clocksource_init(struct timer_of *to) stm32_timer_cnt = timer_of_base(to) + TIM_CNT; sched_clock_register(stm32_read_sched_clock, bits, timer_of_rate(to)); pr_info("%s: STM32 sched_clock registered\n", name); + + stm32_timer_delay.read_current_timer = stm32_read_delay; + stm32_timer_delay.freq = timer_of_rate(to); + register_current_timer_delay(&stm32_timer_delay); + pr_info("%s: STM32 delay timer registered\n", name); } return clocksource_mmio_init(timer_of_base(to) + TIM_CNT, name,