From patchwork Thu Nov 30 16:39:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 120222 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp14169qgn; Thu, 30 Nov 2017 08:40:42 -0800 (PST) X-Google-Smtp-Source: AGs4zMaB9Bl5Z5o0qasDlKm05u8iHEfvC2OeXKl1gyiMI4oQa1Poy7YvvDC2JOAA9Tu3RXD0k+Vq X-Received: by 10.98.223.217 with SMTP id d86mr7298109pfl.190.1512060042648; Thu, 30 Nov 2017 08:40:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512060042; cv=none; d=google.com; s=arc-20160816; b=thDDNbrbZI0jeln7PHTP6/jIn8XCOQ3wLw+Ulb1voIsXtWRA/3T7TBdHZeGG+qCEEa QLMFdxRDr1BSGrqCROWQkBmwkSzLpPTRT+18eOewii1goNLyOIFB5Kx3hUtRcMWD08fB 7sSiK+dwjDrCNU7/FGiNr9z94PEqWnIvLK14QiGb4w2Z4+FnoMA7t7/SCG/MzhZnfVfb c7gAFbHysEkKALqby688Rq/2Rn9yU8ivJyN8LsIgkEHtXt7Y72xdQDnBcF9CyYDew/fj BCWVACNDGHa2a7CIwG3ZIl6nQ36gpO49dEW3mzbEfo+4awqFFkydBEQtdPmWRip0bXXJ bUGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=jSPGZ676VPTSO1PYJhvI0y7XNviHi6dmfs5116hVDXI=; b=hUjmGqLbyVH3goTclrlKa0GU+h2kN+B9uYf0+UbhMzHjx3ABtePbd3D2F04ekqw65u QuPEra7KfudnSLKqNKEp8cnOEi0/A7jCpeasyOPVGwEYYnuh7BT+dDomI9VuG1sjSkq0 QimTqKq4vLMeUISc3+ca4EHXNkxmCBLqnuh58zB/lQo1QLpbvcXGiKwhztFYnL+kY8wy ZeS1qW99oif1/nulve/SLFv84yZvswNJpfoyxYKlwX0TogEmChAe2vLBsSUEpvCvdudD uldOHsySMDcQdTCMAVSzHccW73hYs842G8Ca8XlWkpAPHGeXFwrHLrczP02Wl34XjluG 1oCA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h72si3532928pfj.20.2017.11.30.08.40.19; Thu, 30 Nov 2017 08:40:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753408AbdK3Qjt (ORCPT + 28 others); Thu, 30 Nov 2017 11:39:49 -0500 Received: from foss.arm.com ([217.140.101.70]:57384 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753037AbdK3Qjo (ORCPT ); Thu, 30 Nov 2017 11:39:44 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 85F5915A2; Thu, 30 Nov 2017 08:39:44 -0800 (PST) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 576E43F5B7; Thu, 30 Nov 2017 08:39:44 -0800 (PST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 977161AE3BC9; Thu, 30 Nov 2017 16:39:47 +0000 (GMT) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, ard.biesheuvel@linaro.org, sboyd@codeaurora.org, dave.hansen@linux.intel.com, keescook@chromium.org, msalter@redhat.com, labbott@redhat.com, tglx@linutronix.de, Will Deacon Subject: [PATCH v2 02/18] arm64: mm: Temporarily disable ARM64_SW_TTBR0_PAN Date: Thu, 30 Nov 2017 16:39:30 +0000 Message-Id: <1512059986-21325-3-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1512059986-21325-1-git-send-email-will.deacon@arm.com> References: <1512059986-21325-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We're about to rework the way ASIDs are allocated, switch_mm is implemented and low-level kernel entry/exit is handled, so keep the ARM64_SW_TTBR0_PAN code out of the way whilst we do the heavy lifting. It will be re-enabled in a subsequent patch. Signed-off-by: Will Deacon --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) -- 2.1.4 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index a93339f5178f..7e7d7fd152c4 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -910,6 +910,7 @@ endif config ARM64_SW_TTBR0_PAN bool "Emulate Privileged Access Never using TTBR0_EL1 switching" + depends on BROKEN # Temporary while switch_mm is reworked help Enabling this option prevents the kernel from accessing user-space memory directly by pointing TTBR0_EL1 to a reserved