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[209.132.180.67]) by mx.google.com with ESMTP id b23si2431636pfm.307.2017.10.31.12.55.20; Tue, 31 Oct 2017 12:55:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UtM4pTT4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932928AbdJaTzR (ORCPT + 27 others); Tue, 31 Oct 2017 15:55:17 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:53536 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932684AbdJaTzK (ORCPT ); Tue, 31 Oct 2017 15:55:10 -0400 Received: by mail-pf0-f193.google.com with SMTP id t188so95535pfd.10 for ; Tue, 31 Oct 2017 12:55:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MjRguICDKVjzl7irl2WwsYnsLeJ4YFzhZ8Mkcs898ws=; b=UtM4pTT4r4SUbX/w8fl887r1jCOlYFJ12FQlezqEzNr/5ftDogbWsDlD7NpVX6CzVA SpyVeaC21Yn7jDL3Mf2v4PEYtI0HjVGB/Bpxl1zncKy9QG1gPwSnSO8iCkbY3JWa5D2E Fr0DKIBJs8JPSuNL3W2aUAEdv6Tuc1sOSRHmU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MjRguICDKVjzl7irl2WwsYnsLeJ4YFzhZ8Mkcs898ws=; b=jWtmXvxbXJV69MaB8dFaZJiOd1veJYzuYX1BYWkAMc7lJjuER4/MK5ax1jdg/KwL9q k0ePkrBImXKOVEyWoGt7G1uXSxtLGjFgGLHmNo8ZOiZqhyex0XGJSItagpwSu01yGJ8/ MRCmOehv8DaiuCcRdSlgdptn2SMRNsKugXzMW4fzWZVb5o1qkZaBLHjSNSa/6YOgSpQE m0IlwLekEaJpFnxjJaIml8a6EPkYi8agTrZizSXLpjPvA8SVlIlizG8Snl3RY89VZobT tQpaUEBE8Vzpa18kRSIg7DtowZcCNhK3iFU97wmooWOOh8eZBaxGgcJMyxhkZgEvWUue JIKg== X-Gm-Message-State: AMCzsaVX99bgDRw+J5QvGcIqyPvcEFCJBEQWrDOLHQ8fryrGyi3PDO40 pBRuq34OAZT9kiSHMFeh0dd4 X-Received: by 10.98.194.86 with SMTP id l83mr3197009pfg.314.1509479709918; Tue, 31 Oct 2017 12:55:09 -0700 (PDT) Received: from localhost.localdomain ([2405:204:7307:c0df:a955:b01b:cf95:dedf]) by smtp.gmail.com with ESMTPSA id r18sm4254289pfe.99.2017.10.31.12.55.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 31 Oct 2017 12:55:09 -0700 (PDT) From: Manivannan Sadhasivam To: mturquette@baylibre.com, sboyd@codeaurora.org, afaerber@suse.de, robh+dt@kernel.org, mark.rutland@arm.com Cc: linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, davem@davemloft.net, mchehab@kernel.org, rdunlap@infradead.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, liuwei@actions-semi.com, Manivannan Sadhasivam Subject: [PATCH 3/3] Documentation: add Actions S900 clock bindings Date: Wed, 1 Nov 2017 01:24:23 +0530 Message-Id: <1509479663-8985-4-git-send-email-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509479663-8985-1-git-send-email-manivannan.sadhasivam@linaro.org> References: <1509479663-8985-1-git-send-email-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds clock bindings for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../bindings/clock/actions,s900-clock.txt | 47 ++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/actions,s900-clock.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/clock/actions,s900-clock.txt b/Documentation/devicetree/bindings/clock/actions,s900-clock.txt new file mode 100644 index 0000000..951d6ad --- /dev/null +++ b/Documentation/devicetree/bindings/clock/actions,s900-clock.txt @@ -0,0 +1,47 @@ +* Actions s900 Clock Controller + +The Actions s900 clock controller generates and supplies clock to various +controllers within the SoC. The clock binding described here is applicable to +s900 SoC. + +Required Properties: + +- compatible: should be "actions,s900-clock" +- reg: physical base address of the controller and length of memory mapped + region. +- #clock-cells: should be 1. + +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. + +All available clocks are defined as preprocessor macros in +dt-bindings/clock/actions,s900-clock.h header and can be used in device +tree sources. + +External clocks: + +The hosc clock used as input for the plls is generated outside the SoC. It is +expected that it is defined using standard clock bindings as "hosc". + +Actions s900 Clock Controller also require two more clocks: + - "losc" - internal low frequency oscillator + - "diff_24M" - internal differential 24MHz clock + +Example: Clock controller node: + + clock: clock-controller@e0160000 { + compatible = "actions,s900-clock"; + reg = <0 0xe0160000 0 0x1000>; + #clock-cells = <1>; + }; + +Example: UART controller node that consumes clock generated by the clock +controller: + + serial5: uart@e012a000 { + compatible = "actions,s900-uart", "actions,owl-uart"; + reg = <0x0 0xe012a000 0x0 0x2000>; + interrupts = ; + clocks = <&clock CLK_UART5>; + clock-names = "uart"; + };