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[209.132.180.67]) by mx.google.com with ESMTP id s83si9336457pfg.506.2017.10.29.14.25.01; Sun, 29 Oct 2017 14:25:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=d3VckFBN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932380AbdJ2VY7 (ORCPT + 27 others); Sun, 29 Oct 2017 17:24:59 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:45233 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932342AbdJ2VY4 (ORCPT ); Sun, 29 Oct 2017 17:24:56 -0400 Received: by mail-wm0-f65.google.com with SMTP id y80so5351361wmd.0 for ; Sun, 29 Oct 2017 14:24:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KzLa/zs4q6J9kwvUFKbHHqCCydwxjQBFc5Bc7Px30MQ=; b=d3VckFBNxB1im1+vFRCq+ddLhgcAXGsqQJi5PL0RLy+phfspm7AlmdLERas1KckJrP 2tkwkNilhv4u8tsFgSpzf+peuzTLZBdtes7u7pHQ3+vhc3e7pEhTAuo+70DfyJRYyt70 LyzDlFOQ43+vPALWGqAY9fUoEYxbSfCo+QIx0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KzLa/zs4q6J9kwvUFKbHHqCCydwxjQBFc5Bc7Px30MQ=; b=Uw2xIZUNR0n4FzEDHY+oY5NItWNHK4Vsh6uhIbzj1Vm6kX7ZxeCQOzJ2ZfdHRbiFIp /7BmD6ZGyW/6dEkAqXUyZmhudmy1pb0iYo9sbHQvKABR9lhSn2j1GPNSHBb4pX7GFQX6 +NECptI49L9aP70r/3xo9utHV50ik4SR/uCfUyzMvO5G9Cv8yESk8V/hGc98hdK+kAzH ngvV7vCWFg8ncMH4oY7IggGHRBkWwUHj8iiYi7HY4Y6adQ1cTzXRWWHpCJXWTKz0uTm4 fJR9lUglQMYX2hCPKkJel0p6gdX0qYBl6hBPf+d9DNKV29qLIOgGC9k3twSPA9/Lbv3b ZD3g== X-Gm-Message-State: AMCzsaUvP0wKqaYwzT8RsbFz2qIfLNveOQrjJ7moOYChJNGoXmSCvkwF Owbe/F3D8cvQYTVqjfPcjK+hSb3KtBA= X-Received: by 10.28.35.67 with SMTP id j64mr1853457wmj.55.1509312294669; Sun, 29 Oct 2017 14:24:54 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:2c92:b7e6:9f71:ab86]) by smtp.gmail.com with ESMTPSA id z20sm10067264wrz.62.2017.10.29.14.24.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 29 Oct 2017 14:24:54 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de, daniel.lezcano@linaro.org Cc: linux-kernel@vger.kernel.org, Ard Biesheuvel , Mark Rutland , Marc Zyngier , linux-arm-kernel@lists.infradead.org (moderated list:ARM ARCHITECTED TIMER DRIVER) Subject: [PATCH 13/17] clocksource/drivers/arm_arch_timer: Validate CNTFRQ after enabling frame Date: Sun, 29 Oct 2017 22:20:30 +0100 Message-Id: <1509312035-17368-13-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509312035-17368-1-git-send-email-daniel.lezcano@linaro.org> References: <1509312035-17368-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ard Biesheuvel The ACPI GTDT code validates the CNTFRQ field of each MMIO timer frame against the CNTFRQ system register of the current CPU, to ensure that they are equal, which is mandated by the architecture. However, reading the CNTFRQ field of a frame is not possible until the RFRQ bit in the frame's CNTACRn register is set, and doing so before that willl produce the following error: arch_timer: [Firmware Bug]: CNTFRQ mismatch: frame @ 0x00000000e0be0000: (0x00000000), CPU: (0x0ee6b280) arch_timer: Disabling MMIO timers due to CNTFRQ mismatch arch_timer: Failed to initialize memory-mapped timer. The reason is that the CNTFRQ field is RES0 if access is not enabled. So move the validation of CNTFRQ into the loop that iterates over the timers to find the best frame, but defer it until after we have selected the best frame, which should also have enabled the RFRQ bit. Signed-off-by: Ard Biesheuvel Signed-off-by: Mark Rutland Signed-off-by: Daniel Lezcano --- drivers/clocksource/arm_arch_timer.c | 38 ++++++++++++++++++++---------------- 1 file changed, 21 insertions(+), 17 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index fd4b7f6..14e2419 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1268,10 +1268,6 @@ arch_timer_mem_find_best_frame(struct arch_timer_mem *timer_mem) iounmap(cntctlbase); - if (!best_frame) - pr_err("Unable to find a suitable frame in timer @ %pa\n", - &timer_mem->cntctlbase); - return best_frame; } @@ -1372,6 +1368,8 @@ static int __init arch_timer_mem_of_init(struct device_node *np) frame = arch_timer_mem_find_best_frame(timer_mem); if (!frame) { + pr_err("Unable to find a suitable frame in timer @ %pa\n", + &timer_mem->cntctlbase); ret = -EINVAL; goto out; } @@ -1420,7 +1418,7 @@ arch_timer_mem_verify_cntfrq(struct arch_timer_mem *timer_mem) static int __init arch_timer_mem_acpi_init(int platform_timer_count) { struct arch_timer_mem *timers, *timer; - struct arch_timer_mem_frame *frame; + struct arch_timer_mem_frame *frame, *best_frame = NULL; int timer_count, i, ret = 0; timers = kcalloc(platform_timer_count, sizeof(*timers), @@ -1432,14 +1430,6 @@ static int __init arch_timer_mem_acpi_init(int platform_timer_count) if (ret || !timer_count) goto out; - for (i = 0; i < timer_count; i++) { - ret = arch_timer_mem_verify_cntfrq(&timers[i]); - if (ret) { - pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n"); - goto out; - } - } - /* * While unlikely, it's theoretically possible that none of the frames * in a timer expose the combination of feature we want. @@ -1448,12 +1438,26 @@ static int __init arch_timer_mem_acpi_init(int platform_timer_count) timer = &timers[i]; frame = arch_timer_mem_find_best_frame(timer); - if (frame) - break; + if (!best_frame) + best_frame = frame; + + ret = arch_timer_mem_verify_cntfrq(timer); + if (ret) { + pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n"); + goto out; + } + + if (!best_frame) /* implies !frame */ + /* + * Only complain about missing suitable frames if we + * haven't already found one in a previous iteration. + */ + pr_err("Unable to find a suitable frame in timer @ %pa\n", + &timer->cntctlbase); } - if (frame) - ret = arch_timer_mem_frame_register(frame); + if (best_frame) + ret = arch_timer_mem_frame_register(best_frame); out: kfree(timers); return ret;