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[209.132.180.67]) by mx.google.com with ESMTP id k76si9366466pfb.433.2017.10.29.14.24.25; Sun, 29 Oct 2017 14:24:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=amxZ5hW3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932151AbdJ2VYY (ORCPT + 27 others); Sun, 29 Oct 2017 17:24:24 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:46505 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751319AbdJ2VYW (ORCPT ); Sun, 29 Oct 2017 17:24:22 -0400 Received: by mail-wm0-f65.google.com with SMTP id m72so12185669wmc.1 for ; Sun, 29 Oct 2017 14:24:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iN2W1MQ8GOWR66r3H5whXaHXqpoa/xr32b5KjJefvSI=; b=amxZ5hW3TtJAjQPHVJaL4CWJRlj5FGCoXsPEJPEnUZ3luuOqFnOP27+w/y6lHtHxD2 pOrKOlenSbxRQMTIJgdoW7ZZ4y7iWw3Mkomj6GqiE7tlg+EJ0pZNRfzzN8UPKi+4sl4d B2/iudN4+2ykYdG1BbcUggTvsIze5pkUAjOPc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iN2W1MQ8GOWR66r3H5whXaHXqpoa/xr32b5KjJefvSI=; b=SPVGsSjS26FccvtEOA3H4tEDSETQxPBwmKfjtpQ127JS53jySlJWomK7VzW9SPg9pX KoX0otHWZ8mEAfqlwjhj/G/jiEHzEVCrWyFAUrfLHcrh0VehImAOLQ1C5dpbUD8NAwtp hDsA2fcmXyGlXcMYOO1As4Q9n2VFiPNNs7T9N+zxkb0hQLt+jTG2rwBJHM4ojWmd95YV 2kpuFsCvReIoCfCMlDU7qLfrb9vhKJIoiMrpBLswqShl3Rz68CSSWCBnzdjhfu4qiDLQ GFUv5XXLw9f/VJ1sTGq4WC3h5VenXSp4n7xjoYalivWOHaA2mNXt7/tJFLOVOYulL9O9 8KLw== X-Gm-Message-State: AMCzsaXfoONf9+F+LKj+i3OEMN19S3aWMkSg5lVjefSxFUrDMLZMoIAx yq5mGqaXb+xYG+K0OLrCnf1Sgg== X-Received: by 10.28.67.68 with SMTP id q65mr2042807wma.96.1509312260353; Sun, 29 Oct 2017 14:24:20 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:2c92:b7e6:9f71:ab86]) by smtp.gmail.com with ESMTPSA id z20sm10067264wrz.62.2017.10.29.14.24.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 29 Oct 2017 14:24:19 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de, daniel.lezcano@linaro.org Cc: linux-kernel@vger.kernel.org, Geert Uytterhoeven , Rob Herring , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 01/17] dt-bindings: timer: renesas, cmt: Fix SoC-specific compatible values Date: Sun, 29 Oct 2017 22:20:18 +0100 Message-Id: <1509312035-17368-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Geert Uytterhoeven While the new family-specific compatible values introduced by commit 6f54cc1adcc8957f ("devicetree: bindings: R-Car Gen2 CMT0 and CMT1 bindings") use the recommended order ",-", the new SoC-specific compatible values still use the old and deprecated order ",-". Switch the SoC-specific compatible values to the recommended order while there are no upstream users of these compatible values yet. Fixes: 7f03a0ecfdc786c1 ("devicetree: bindings: r8a73a4 and R-Car Gen2 CMT bindings") Fixes: 63d9e8ca0dd4bfa4 ("devicetree: bindings: Deprecate property, update example") Signed-off-by: Geert Uytterhoeven Acked-by: Rob Herring Reviewed-by: Laurent Pinchart Signed-off-by: Daniel Lezcano --- .../devicetree/bindings/timer/renesas,cmt.txt | 24 +++++++++++----------- 1 file changed, 12 insertions(+), 12 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 6ca6b9e..d740989 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -20,16 +20,16 @@ Required Properties: (CMT1 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-48-* entries. - - "renesas,cmt0-r8a73a4" for the 32-bit CMT0 device included in r8a73a4. - - "renesas,cmt1-r8a73a4" for the 48-bit CMT1 device included in r8a73a4. - - "renesas,cmt0-r8a7790" for the 32-bit CMT0 device included in r8a7790. - - "renesas,cmt1-r8a7790" for the 48-bit CMT1 device included in r8a7790. - - "renesas,cmt0-r8a7791" for the 32-bit CMT0 device included in r8a7791. - - "renesas,cmt1-r8a7791" for the 48-bit CMT1 device included in r8a7791. - - "renesas,cmt0-r8a7793" for the 32-bit CMT0 device included in r8a7793. - - "renesas,cmt1-r8a7793" for the 48-bit CMT1 device included in r8a7793. - - "renesas,cmt0-r8a7794" for the 32-bit CMT0 device included in r8a7794. - - "renesas,cmt1-r8a7794" for the 48-bit CMT1 device included in r8a7794. + - "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4. + - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4. + - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790. + - "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790. + - "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791. + - "renesas,r8a7791-cmt1" for the 48-bit CMT1 device included in r8a7791. + - "renesas,r8a7793-cmt0" for the 32-bit CMT0 device included in r8a7793. + - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793. + - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794. + - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794. - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2. - "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2. @@ -46,7 +46,7 @@ Required Properties: Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes cmt0: timer@ffca0000 { - compatible = "renesas,cmt0-r8a7790", "renesas,rcar-gen2-cmt0"; + compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0"; reg = <0 0xffca0000 0 0x1004>; interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>, <0 142 IRQ_TYPE_LEVEL_HIGH>; @@ -55,7 +55,7 @@ Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes }; cmt1: timer@e6130000 { - compatible = "renesas,cmt1-r8a7790", "renesas,rcar-gen2-cmt1"; + compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1"; reg = <0 0xe6130000 0 0x1004>; interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>, <0 121 IRQ_TYPE_LEVEL_HIGH>,