From patchwork Tue Oct 24 10:22:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 116932 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp5632506qgn; Tue, 24 Oct 2017 03:23:18 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SoMvqcZOuA3IDbEcupOIdYY33hTXw8X3qf64/1MLbR3RNyMmRcNjtQ/2uGlS1MTyxwESui X-Received: by 10.159.254.20 with SMTP id r20mr12782702pls.443.1508840598688; Tue, 24 Oct 2017 03:23:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508840598; cv=none; d=google.com; s=arc-20160816; b=huI6sfQCvfAgjQ2iZ4ktAl0ZkPh7jtqbElLqmjGyrTS3vCIAXBfqST1okXS5s9bAwe jQTLxJqIdLaHrZrLosM3veliRE6n6dXeRlzMl8Addc6bdbQVbof7E8WYch6vhwI8Aq/T g/j0fTgzHmJGEqWOCDm5ydtgCiwcN+vUIQonDbV6uphoz0zyWNAuUzihfrOtS8Aw5rR+ /sROoCilq37YRDdEpelPZxIY1orNOly1MM4sPXUseTbExmnOU4yxyeFDj5q+FyAJkRZs 0uOazCEdLZujUjJ+5nesjoz6XiNMlep+8g/lsKbTyjctAsRfgieDxQjis55LfOVM44p/ 7I5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=XSd9rhiTZBuM7IE2MlghlLqediHhf+2rrjnVwAOrbMI=; b=JsLPTVFK+t0ojj60dMUXlvgUZb6OqfBUREpafaE6EmqEgGVX1A1ePrRjkPpIESzd7g CRKBPk543kUfLFkovTMwuc3r2xlvnaVgYsGAm6rdBWlOnMeFN6ISZjFiVOb3U7b9uh+I i/OYcmeIjK7wdtzgPgHIGrAJo/kRUdGKwMzFUUnNGJHov6TbcJggJtMZ7PEr2o8YNWWI UdLbBdSpNKR0xnNXB4JvXGFIxPLXZGj1UgHo0r1Pdcw90KJ2q62dqGv+yLorxbz+uEPi faKRU2b5e1RHb0sx/NJLqTXJRlyHzIN2fdaedktsydaRDKuapQpUNU9+FiprS1TdvhzB Y9yw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r79si6826390pfa.337.2017.10.24.03.23.18; Tue, 24 Oct 2017 03:23:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932627AbdJXKXQ (ORCPT + 27 others); Tue, 24 Oct 2017 06:23:16 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:53048 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932508AbdJXKWv (ORCPT ); Tue, 24 Oct 2017 06:22:51 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 762FA164F; Tue, 24 Oct 2017 03:22:51 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 485BB3F25D; Tue, 24 Oct 2017 03:22:51 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 2F1E91AE3565; Tue, 24 Oct 2017 11:22:51 +0100 (BST) From: Will Deacon To: mingo@kernel.org Cc: linux-kernel@vger.kernel.org, Will Deacon , "Paul E. McKenney" Subject: [PATCH v2 5/5] alpha: atomics: Add smp_read_barrier_depends() to release/relaxed atomics Date: Tue, 24 Oct 2017 11:22:50 +0100 Message-Id: <1508840570-22169-6-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1508840570-22169-1-git-send-email-will.deacon@arm.com> References: <1508840570-22169-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As part of the fight against smp_read_barrier_depends(), we require dependency ordering to be preserved when a dependency is headed by a load performed using an atomic operation. This patch adds smp_read_barrier_depends() to the _release and _relaxed atomics on alpha, which otherwise lack anything to enforce dependency ordering. Signed-off-by: Will Deacon Signed-off-by: Paul E. McKenney --- arch/alpha/include/asm/atomic.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.1.4 diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h index 498933a7df97..16961a3f45ba 100644 --- a/arch/alpha/include/asm/atomic.h +++ b/arch/alpha/include/asm/atomic.h @@ -13,6 +13,15 @@ * than regular operations. */ +/* + * To ensure dependency ordering is preserved for the _relaxed and + * _release atomics, an smp_read_barrier_depends() is unconditionally + * inserted into the _relaxed variants, which are used to build the + * barriered versions. To avoid redundant back-to-back fences, we can + * define the _acquire and _fence versions explicitly. + */ +#define __atomic_op_acquire(op, args...) op##_relaxed(args) +#define __atomic_op_fence __atomic_op_release #define ATOMIC_INIT(i) { (i) } #define ATOMIC64_INIT(i) { (i) } @@ -60,6 +69,7 @@ static inline int atomic_##op##_return_relaxed(int i, atomic_t *v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ } @@ -77,6 +87,7 @@ static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ } @@ -111,6 +122,7 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ } @@ -128,6 +140,7 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ }