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[86.26.100.93]) by smtp.gmail.com with ESMTPSA id 29sm9666451wrz.77.2017.10.24.02.56.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 24 Oct 2017 02:56:47 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org, Bryan O'Donoghue , Srinivas Kandagatla Subject: [PATCH 03/10] nvmem: imx-ocotp: Restrict OTP write to IMX6 processors Date: Tue, 24 Oct 2017 10:54:27 +0100 Message-Id: <1508838874-32252-4-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1508838874-32252-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bryan O'Donoghue i.MX7S/D have a different scheme for addressing the OTP registers inside the OCOTP block. Currently it's possible to address the wrong OTP registers given the disparity between IMX6 and IMX7 OTP addressing. Since OTP programming is one-time destructive its important we restrict this interface ASAP. Fixes: 0642bac7da42 ("nvmem: imx-ocotp: add write support") Signed-off-by: Bryan O'Donoghue Acked-by: Philipp Zabel Signed-off-by: Srinivas Kandagatla --- drivers/nvmem/imx-ocotp.c | 2 ++ 1 file changed, 2 insertions(+) -- 1.9.1 diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c index 193ca8f..17d160f 100644 --- a/drivers/nvmem/imx-ocotp.c +++ b/drivers/nvmem/imx-ocotp.c @@ -347,6 +347,8 @@ static int imx_ocotp_probe(struct platform_device *pdev) imx_ocotp_nvmem_config.dev = dev; imx_ocotp_nvmem_config.priv = priv; priv->config = &imx_ocotp_nvmem_config; + if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx7d-ocotp")) + imx_ocotp_nvmem_config.read_only = true; nvmem = nvmem_register(&imx_ocotp_nvmem_config); if (IS_ERR(nvmem))