From patchwork Thu Oct 12 14:26:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 115635 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp2003450qgn; Thu, 12 Oct 2017 07:26:22 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAAw5/KHpHHHDVlRnJxVdnjyUIrFtFqtiZDBCqoCVE2DNS8ShMUUzWpm6oZ/vbXF2HAQgds X-Received: by 10.99.101.68 with SMTP id z65mr379562pgb.205.1507818381920; Thu, 12 Oct 2017 07:26:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507818381; cv=none; d=google.com; s=arc-20160816; b=miUQR+I14mBKnQVBbav3cNOLdNmuEJUoADHKgv3VbRjByVEfULvumYB83mfWSKRMN3 iyEpI6oZJPi/8NTBmSwuGen5LcDUTY+zeipO7+ewQ9cfZ1D/HM4yd04xYo/6rDzpeN87 buwH0n5jw+oTBJNYQcUx87raHbEGtlOP1qmGDRm8Y1hJtKEREGFqqvQX1FuQngE+Kke9 AMGpDSEG3Q/wUqTGNrSvZrlJJ7rtT0XBOYF4CnSNoS447J7djpNPrX3Qhg6BFyyM93Bs RkUdOgE0A8lDpr/bjDR66DFHwVk0R/guXyil/CbYQu75HD64Ok73KQ2rSpwofiuE5G4T Chzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=H5PTFV7hS/TDgppTTAVjTRAHxSxpVJ6UtxANFounLgA=; b=Q1TUQhxSTfadbZNeVabBbBdVtX7EISHA/tMqHaxDx1GlhhplL1K+2tEuBN+YkDIRcr TeiebEnWLmG8MYezwbGqxnARo9R2khmfAFRkflBboUsHBiWjeYxB5mlynFBnQpTkzx/f wuq4WPwlQugMvtVd8aiZ2nqHpWBJBoUYIM4n22RwQaZ2zJHcfyi5keAFH+J1nSmU8qoZ WIFutsVhXH/K6E8c8yeEv2LdIuHXICiDNzAqOHr8kSm/InTva1yT6fFftCXo7NKAJE9s QmY6224FLXbkRyXmRGiH9cB/gSzIAMp/N8pSYQcul6w0b0dKj2Lf0X7PvmWCKpiUIORV s7BA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o129si12483338pfo.203.2017.10.12.07.26.21; Thu, 12 Oct 2017 07:26:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752628AbdJLO0T (ORCPT + 27 others); Thu, 12 Oct 2017 10:26:19 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:47894 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752213AbdJLO0P (ORCPT ); Thu, 12 Oct 2017 10:26:15 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 12F8415BF; Thu, 12 Oct 2017 07:26:15 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D81533F236; Thu, 12 Oct 2017 07:26:14 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 8630A1AE2DFF; Thu, 12 Oct 2017 15:26:18 +0100 (BST) From: Will Deacon To: paulmck@linux.vnet.ibm.com Cc: linux-kernel@vger.kernel.org, mcree@orcon.net.nz, peterz@infradead.org, rth@twiddle.net, ink@jurassic.park.msu.ru, mattst88@gmail.com, linux-alpha@vger.kernel.org, Will Deacon Subject: [PATCH 3/3] alpha: atomics: Add smp_read_barrier_depends() to release/relaxed atomics Date: Thu, 12 Oct 2017 15:26:17 +0100 Message-Id: <1507818377-7546-4-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1507818377-7546-1-git-send-email-will.deacon@arm.com> References: <1507818377-7546-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As part of the fight against smp_read_barrier_depends(), we require dependency ordering to be preserved when a dependency is headed by a load performed using an atomic operation. This patch adds smp_read_barrier_depends() to the _release and _relaxed atomics on alpha, which otherwise lack anything to enforce dependency ordering. Signed-off-by: Will Deacon --- arch/alpha/include/asm/atomic.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.1.4 Reviewed-by: Paul E. McKenney diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h index 498933a7df97..16961a3f45ba 100644 --- a/arch/alpha/include/asm/atomic.h +++ b/arch/alpha/include/asm/atomic.h @@ -13,6 +13,15 @@ * than regular operations. */ +/* + * To ensure dependency ordering is preserved for the _relaxed and + * _release atomics, an smp_read_barrier_depends() is unconditionally + * inserted into the _relaxed variants, which are used to build the + * barriered versions. To avoid redundant back-to-back fences, we can + * define the _acquire and _fence versions explicitly. + */ +#define __atomic_op_acquire(op, args...) op##_relaxed(args) +#define __atomic_op_fence __atomic_op_release #define ATOMIC_INIT(i) { (i) } #define ATOMIC64_INIT(i) { (i) } @@ -60,6 +69,7 @@ static inline int atomic_##op##_return_relaxed(int i, atomic_t *v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ } @@ -77,6 +87,7 @@ static inline int atomic_fetch_##op##_relaxed(int i, atomic_t *v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ } @@ -111,6 +122,7 @@ static __inline__ long atomic64_##op##_return_relaxed(long i, atomic64_t * v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ } @@ -128,6 +140,7 @@ static __inline__ long atomic64_fetch_##op##_relaxed(long i, atomic64_t * v) \ ".previous" \ :"=&r" (temp), "=m" (v->counter), "=&r" (result) \ :"Ir" (i), "m" (v->counter) : "memory"); \ + smp_read_barrier_depends(); \ return result; \ }