From patchwork Thu Oct 12 12:20:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 115609 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp1875117qgn; Thu, 12 Oct 2017 05:20:54 -0700 (PDT) X-Google-Smtp-Source: AOwi7QBNcfURSa5vRmfJAx+iznhoMSBRpuk7ZETW68KfzNm5ZgS+degBPxJkn5Qv0eMeJDVEoxyn X-Received: by 10.98.196.209 with SMTP id h78mr2063470pfk.249.1507810854243; Thu, 12 Oct 2017 05:20:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507810854; cv=none; d=google.com; s=arc-20160816; b=VyKGG0Ef55gJXssBMlV2XZvjMWt6fN7vtHQpoJ6Qs87XsCZqHzGwUN94GmfSdw9XM9 mbOFzoMcME+uck/YxPQMdtbU8BXPz3mZqzpkXrRr6AWoRCcKPXqtjXjohkr8anruktak t7LuId3mfHo1ZsugwEjjvZmkwp1Jvj+iB4NauTFhnqStRAICDDaVf0zzb7ARHmrJqUwW K+wUEAgFEg97UYZslNpAPHWjlTD2UTPtSDUAeMwtrLWB2vCYlPjY+pFKvHJ4Jc6cfjuN CTDyO8t5Vr94tVsfeBgAk99H8B2nzHk0U97pKx6IIWHbrvf/CejjfpM8nMYYadPgROXG VCFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Lsbu1jjDUivTkhhOKC6THwxDtyqrfTUgDs8peL1zrsc=; b=vkWcZS8JAGhvdpXAeY8od6oBXcDswbiCB5EIt467MT1Qy1R79ipQjhGRNH6dtLaGi2 NsMGdgDdQSGSXE7slCRgpRbTxp4cN8jTYHcL1ai3HcFvfht4Z74Z0HazOkWqqNjlLg7t ObY/NBeukTVw5PInMb/d+CHjfi1uBaCIZey8/rVC1bjTdca37Msq2hHMFQ8Th5MXbRZE 7xtz8exo69aFsu2M3rWgvE3B8Zyf4eRB1tAp6aJFLNQ94wTz64twoFWHMFek2mVdX1pJ kC2/TefnZoo9YLpvDHdrEA/KlhSIFvESrngqhBLObSHUXJy2xV6TbHM/H5y3ioyllFeh q6Fw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r145si6892595pgr.753.2017.10.12.05.20.53; Thu, 12 Oct 2017 05:20:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757297AbdJLMUw (ORCPT + 27 others); Thu, 12 Oct 2017 08:20:52 -0400 Received: from foss.arm.com ([217.140.101.70]:45518 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756918AbdJLMUt (ORCPT ); Thu, 12 Oct 2017 08:20:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A4F5B15BF; Thu, 12 Oct 2017 05:20:48 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 769183F59E; Thu, 12 Oct 2017 05:20:48 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 268611AE2E1C; Thu, 12 Oct 2017 13:20:52 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Jeremy.Linton@arm.com, peterz@infradead.org, mingo@redhat.com, longman@redhat.com, boqun.feng@gmail.com, paulmck@linux.vnet.ibm.com, Will Deacon Subject: [PATCH v3 2/5] locking/atomic: Add atomic_cond_read_acquire Date: Thu, 12 Oct 2017 13:20:48 +0100 Message-Id: <1507810851-306-3-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1507810851-306-1-git-send-email-will.deacon@arm.com> References: <1507810851-306-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org smp_cond_load_acquire provides a way to spin on a variable with acquire semantics until some conditional expression involing the variable is satisfied. Architectures such as arm64 can potentially enter a low-power state, waking up only when the value of the variable changes, which reduces the system impact of tight polling loops. This patch makes the same interface available to users of atomic_t, atomic64_t and atomic_long_t, rather than require messy accesses to the structure internals. Cc: Peter Zijlstra Cc: Ingo Molnar Cc: Waiman Long Cc: Boqun Feng Cc: "Paul E. McKenney" Signed-off-by: Will Deacon --- include/asm-generic/atomic-long.h | 3 +++ include/linux/atomic.h | 4 ++++ 2 files changed, 7 insertions(+) -- 2.1.4 diff --git a/include/asm-generic/atomic-long.h b/include/asm-generic/atomic-long.h index 288cc9e96395..f2d97b782031 100644 --- a/include/asm-generic/atomic-long.h +++ b/include/asm-generic/atomic-long.h @@ -243,4 +243,7 @@ static inline long atomic_long_add_unless(atomic_long_t *l, long a, long u) #define atomic_long_inc_not_zero(l) \ ATOMIC_LONG_PFX(_inc_not_zero)((ATOMIC_LONG_PFX(_t) *)(l)) +#define atomic_long_cond_read_acquire(v, c) \ + ATOMIC_LONG_PFX(_cond_read_acquire)((ATOMIC_LONG_PFX(_t) *)(v), (c)) + #endif /* _ASM_GENERIC_ATOMIC_LONG_H */ diff --git a/include/linux/atomic.h b/include/linux/atomic.h index 40d6bfec0e0d..0aeb2b3f4578 100644 --- a/include/linux/atomic.h +++ b/include/linux/atomic.h @@ -653,6 +653,8 @@ static inline int atomic_dec_if_positive(atomic_t *v) } #endif +#define atomic_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c)) + #ifdef CONFIG_GENERIC_ATOMIC64 #include #endif @@ -1072,6 +1074,8 @@ static inline long long atomic64_fetch_andnot_release(long long i, atomic64_t *v } #endif +#define atomic64_cond_read_acquire(v, c) smp_cond_load_acquire(&(v)->counter, (c)) + #include #endif /* _LINUX_ATOMIC_H */