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[209.132.180.67]) by mx.google.com with ESMTP id o9si8801009pgq.600.2017.10.10.11.12.57; Tue, 10 Oct 2017 11:12:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zh7cKJ2h; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932735AbdJJSM4 (ORCPT + 26 others); Tue, 10 Oct 2017 14:12:56 -0400 Received: from mail-wm0-f54.google.com ([74.125.82.54]:46344 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932499AbdJJSFA (ORCPT ); Tue, 10 Oct 2017 14:05:00 -0400 Received: by mail-wm0-f54.google.com with SMTP id m72so7518013wmc.1 for ; Tue, 10 Oct 2017 11:05:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YptLcdGgKlhC498HPJAn9VWTrVbEotgv7lCmeTNIn60=; b=Zh7cKJ2hqQ5q1l61UnfQNDyyBcGG2Vtr0rqyN7Y2gajqrP/H2LF1ccNY3ZnQSJxNEC prpkuwr0ATLcKfLHFAwUA4NCsKs3lV1caWgJdBY5KM7ZZUPHhb/iYoUcu7HV/7jUrbx5 rNgkBbqhzqmG3Lh3CISpmL9MrQ3xR2TfJbYo0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YptLcdGgKlhC498HPJAn9VWTrVbEotgv7lCmeTNIn60=; b=qF7oampOeOU8tvwqy8eWXK7aS0w6SRW0qrUAgAJGzUVXxZFEnXgdUTgA3xGUgbYDvc BNLHWe2rWQAkPNkDSnEJ5rjrIJYSjRN6DWVn6NdqiLAqm3I8xAqYhtcC2IECdaEzThtD g74uiZqxCnQyFDr+n8qQr+aYuBPNwj1nOWUCgV2iWvUNVoknxvpqrfgEHVC/oOJZYT8L iB57col+skwn9D6E72TM98pdIvRU18olqCbb1+kJmxeeXIvDYhRAMMak7hSYIH80rB6L vSdY0qlKaotIRqiv8kN4jRvr4Lwy5qGoz0P0NiTBt+5O4rHWV0vHwM0BKkkL9BpJom73 pp2A== X-Gm-Message-State: AMCzsaUGql0cH+FXVQ7FnrQUopkmoecqH4Nq0ZEZjE0mNt4OGntEm+DF 9xrA0MmtYt1TfUHJdsWbxIHwyQ== X-Google-Smtp-Source: AOwi7QC0Fdo/wgcfYKQuvJz4XVj4RLlYM6TQfWW0HVjgnNQslfIiGXof9fBCtr5gPeFiAUiDFstE3Q== X-Received: by 10.28.46.210 with SMTP id u201mr11301324wmu.64.1507658699375; Tue, 10 Oct 2017 11:04:59 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:4f9:3ae1:43d2:31ae]) by smtp.gmail.com with ESMTPSA id l73sm12513428wmd.47.2017.10.10.11.04.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 Oct 2017 11:04:58 -0700 (PDT) From: Daniel Lezcano To: edubezval@gmail.com, rui.zhang@intel.com Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, kevin.wangtao@linaro.org Subject: [PATCH 08/25] thermal/drivers/hisi: Fix configuration register setting Date: Tue, 10 Oct 2017 20:02:33 +0200 Message-Id: <1507658570-32675-8-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507658570-32675-1-git-send-email-daniel.lezcano@linaro.org> References: <79a5f10c-0fb7-3e4f-caac-c1625904b137@linaro.org> <1507658570-32675-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The TEMP0_CFG configuration register contains different field to set up the temperature controller. However in the code, nothing prevents a setup to overwrite the previous one: eg. writing the hdak value overwrites the sensor selection, the sensor selection overwrites the hdak value. In order to prevent such thing, use a regmap-like mechanism by reading the value before, set the corresponding bits and write the result. Signed-off-by: Daniel Lezcano --- drivers/thermal/hisi_thermal.c | 34 +++++++++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c index 8e8a117..5688556 100644 --- a/drivers/thermal/hisi_thermal.c +++ b/drivers/thermal/hisi_thermal.c @@ -30,6 +30,8 @@ #define TEMP0_TH (0x4) #define TEMP0_RST_TH (0x8) #define TEMP0_CFG (0xC) +#define TEMP0_CFG_SS_MSK (0xF000) +#define TEMP0_CFG_HDAK_MSK (0x30) #define TEMP0_EN (0x10) #define TEMP0_INT_EN (0x14) #define TEMP0_INT_CLR (0x18) @@ -132,19 +134,41 @@ static inline void hisi_thermal_enable(void __iomem *addr, int value) writel(value, addr + TEMP0_EN); } -static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) +static inline int hisi_thermal_get_temperature(void __iomem *addr) { - writel((sensor << 12), addr + TEMP0_CFG); + return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); } -static inline int hisi_thermal_get_temperature(void __iomem *addr) +/* + * Temperature configuration register - Sensor selection + * + * Bits [19:12] + * + * 0x0: local sensor (default) + * 0x1: remote sensor 1 (ACPU cluster 1) + * 0x2: remote sensor 2 (ACPU cluster 0) + * 0x3: remote sensor 3 (G3D) + */ +static inline void hisi_thermal_sensor_select(void __iomem *addr, int sensor) { - return hisi_thermal_step_to_temp(readl(addr + TEMP0_VALUE)); + writel((readl(addr + TEMP0_CFG) & ~TEMP0_CFG_SS_MSK ) | + (sensor << 12), addr + TEMP0_CFG); } +/* + * Temperature configuration register - Hdak conversion polling interval + * + * Bits [5:4] + * + * 0x0 : 0.768 ms + * 0x1 : 6.144 ms + * 0x2 : 49.152 ms + * 0x3 : 393.216 ms + */ static inline void hisi_thermal_hdak_set(void __iomem *addr, int value) { - writel(value, addr + TEMP0_CFG); + writel((readl(addr + TEMP0_CFG) & ~TEMP0_CFG_HDAK_MSK) | + (value << 4), addr + TEMP0_CFG); } static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,