From patchwork Tue Aug 29 09:34:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 111208 Delivered-To: patch@linaro.org Received: by 10.140.95.112 with SMTP id h103csp1063050qge; Tue, 29 Aug 2017 02:37:35 -0700 (PDT) X-Received: by 10.84.229.77 with SMTP id d13mr321079pln.235.1503999455099; Tue, 29 Aug 2017 02:37:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503999455; cv=none; d=google.com; s=arc-20160816; b=ON2wRr912+zPF0nnIBdz2m/qu9p7c2doTCZB0W2MSJzq8TJ4d4L6iNnMmz5aZN8S/Y zVcaIALTtH5uUtpnIV5PJe8Hs/aWZr+AItGtYaaJw0OEWUbcO/hPOzTV5AAsOACCLOV0 l9oDosqxJ4lHshVWxFpQjy8jPwCSCMCVHpLdIOBRa9NT+02U8iU4XSMZwnXPh6ades8l y2POOkrWqCUknJe49TJMMOt/zPNYdvx56YxFmuKbn2K8XDa+SfS9sEeqyOPCYYRRRnEb p/w1m8tmvgE5E+cybECyuF0tfJ1nBkrq0zrDgKSfVP+m6O58t+DbMo7NxQhz25NcE1MD 9AaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Y6Y6j4jy3nNhVyt5YIu01w/u7A536PqHwLjICFwSg2A=; b=mB9NJ2n4Ig3rODhkEimNkOlW+150sfSH1/lvH1mHfMm1PPGiAqlsytqK9iKRm/ZlPL dUQxb7s0zi5EcsUqd2BL0DEo43pUF99LyfBBuDkRD0K3PU78NvDup5o7KdZzxDlIdDNH fgROb+taXDQZ1Kw9oHmFQgCkL+6O2ojyvP/jX3x9CA1880Py5cClF1BrbGpHMvmOr5k7 hFgbMKYlSg0pjU9HohQaMqFGzza6X6U66KgP+ymO5mqEbvU1o4FSKQFKlogxITCZQgGL uzXL99Rh808H0iJXEXc9mDo7lbPI6CGOztD55VpVOILah8ESn0WWWxJDtd+4PHzY4qYC NS0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Psuv/Pof; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i5si2014164pgf.424.2017.08.29.02.37.34; Tue, 29 Aug 2017 02:37:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Psuv/Pof; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752320AbdH2Jhc (ORCPT + 26 others); Tue, 29 Aug 2017 05:37:32 -0400 Received: from mail-wm0-f46.google.com ([74.125.82.46]:37163 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752082AbdH2Jfy (ORCPT ); Tue, 29 Aug 2017 05:35:54 -0400 Received: by mail-wm0-f46.google.com with SMTP id u26so18642132wma.0 for ; Tue, 29 Aug 2017 02:35:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Y6Y6j4jy3nNhVyt5YIu01w/u7A536PqHwLjICFwSg2A=; b=Psuv/Pofzt1Fj9kwLurAjBgheRcJ/o8m/RTKTaVSng6pbAQnMpgjD8e2wPYX7yhkoz CO18OOBqp/4Qf8YXvIrpCY1/LSXit/FV81aRd6r1X07HIp4y++3n7OAznZC8Suv7tYS+ oQHJIUSzHFFpiutzmGDcopQDstRkHWlnfVS8w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Y6Y6j4jy3nNhVyt5YIu01w/u7A536PqHwLjICFwSg2A=; b=OEDZIqmAdlrLNzgCwHK6ngNcEt8o+DwRXTTw+5B9nHdaQD7vu/6IxBtB4KLeAjkoAc RJrPY10+ccMALD2ZpgHbVNufGtLjbFJAOaAYXielFHPKpcuRn1wuX9xDbCtZWkHZB/zh gqYRVrFp52jaXVwmemT3Ez7tiAQKkAgEgY0OiZ5qGzpQBG2WMWaDVbrH898vg5CuJqyN aTiKcvr6oE60vsOOeCEtc/Gocqz54pQYHz8j7KgNjMOLn4nTLI6wHG3fCRvTDwwr05DA KfeWTF3g9kqAlZTihs3B9lHfxrw9SEntS4WkNroSMxOwPtvHvAHB1z3XSXTcsyOvrpY9 GXUA== X-Gm-Message-State: AHYfb5jfhC6CVBoXaJ3rrWrsuq4fxbKLzVFRhgMXYSGDoOtW7KbFMO7l eTamqjOg+8h0lCU3 X-Received: by 10.28.232.193 with SMTP id f62mr811681wmi.155.1503999353264; Tue, 29 Aug 2017 02:35:53 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:cc22:a7ba:e8a7:7caf]) by smtp.gmail.com with ESMTPSA id r18sm3621775wrc.44.2017.08.29.02.35.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Aug 2017 02:35:52 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Magnus Damm , Geert Uytterhoeven , Laurent Pinchart , Rob Herring , Rob Herring , Mark Rutland , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Subject: [PATCH 3/9] devicetree: bindings: Remove sh7372 CMT binding Date: Tue, 29 Aug 2017 11:34:21 +0200 Message-Id: <1503999271-15712-3-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org> References: <20170829093354.GA2572@mai> <1503999271-15712-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Magnus Damm Remove the sh7372 CMT compat string to reduce maintenance burden. It should be fine to break DT compatibility because: 1) The sh7372 SoC support has been removed from upstream 2) The sh7372 CMT DT binding was never part of upstream DTS 3) The CMT driver never matches on the sh7372 binding Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Rob Herring Signed-off-by: Daniel Lezcano --- Documentation/devicetree/bindings/timer/renesas,cmt.txt | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt index 1a05c1b..961c0b6 100644 --- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt +++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt @@ -14,32 +14,26 @@ Required Properties: - compatible: must contain one or more of the following: - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT (CMT0) - - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT - (CMT0) - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT (CMT0) - "renesas,cmt-32" for all 32-bit CMT without fast clock support - (CMT0 on sh7372, sh73a0 and r8a7740) + (CMT0 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-32-* entries. - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast clock support (CMT[234]) - - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast - clock support (CMT[234]) - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast clock support (CMT[234]) - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support - (CMT[234] on sh7372, sh73a0 and r8a7740) + (CMT[234] on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-32-fast-* entries. - - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT - (CMT1) - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT (CMT1) - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT (CMT1) - "renesas,cmt-48" for all non-second generation 48-bit CMT - (CMT1 on sh7372, sh73a0 and r8a7740) + (CMT1 on sh73a0 and r8a7740) This is a fallback for the above renesas,cmt-48-* entries. - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT