From patchwork Wed Aug 9 16:43:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 109736 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp1125367qge; Wed, 9 Aug 2017 09:45:00 -0700 (PDT) X-Received: by 10.84.197.3 with SMTP id m3mr9787005pld.241.1502297100565; Wed, 09 Aug 2017 09:45:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502297100; cv=none; d=google.com; s=arc-20160816; b=XkULW+jULr5S/Sj641+1goPwVJE72GMS8L9QssBaPxsNw8e3bhMwidCctRuwX7y6ul 1DboMsHbTa6R9Lh19LQsmmJGA853NAU8EogrvnZlOgThDUMhMZWZ09oeo4M6ckkcSc28 UpApsT7VkmPJpooyMAxKj5hD8NNj2Vb+8sSl2tgV1l0Ie7mTe+JCjUybUiBX+/Nrb8ND 7ssPoD/kwHVUxDQ4kLq486rMrnMjgflqYZNW1adh9b4/gYmuYbVjhWzTo/ZMazVHmeSj XmrYxnd53K9fQMsO4+cBCBmGV8F5au+ry3PvR/MEt1QK0UWD4dck1Rh84Jv2ce/9Hp/X Hgpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:dkim-filter:arc-authentication-results; bh=gz8kIP8h2s4Uc5v4MFJ7ZyCmT+L0I6qe9ifAzTQIQkg=; b=npt1l1DS+/3g3wjNLbPN5r84eqj6nnt/vWddUD5Tu2TB5rxHncjVHpef++qT1fTYKR /rVz240ExFhso8MA7evqq1v+iY9yA1c6KAGHIeA9/xOFs5fVlMNyrl3BgFQY7elfwEzs aR3qJOE++dKKE8klgQiypTEiZA7wUyd31sFeATTjm2zWkl2qEQXojF1Dz0SDv8Z1mqLJ bJvP68p3YHqwOr9TyeF9XWrlYy21ptRXBvcnPjmD+bRGMLZYhygc/omJPOS1cpC1TJSi bJnw59JJE1vEpZ522T/m/3hhEIiErkoDX/vfl8wiEmdeR/2c5Hqu0MXDJB6aHFBKRkje 0WRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=oqB3S7CM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x63si2798423pff.604.2017.08.09.09.45.00; Wed, 09 Aug 2017 09:45:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=oqB3S7CM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754291AbdHIQoz (ORCPT + 25 others); Wed, 9 Aug 2017 12:44:55 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:60873 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754197AbdHIQow (ORCPT ); Wed, 9 Aug 2017 12:44:52 -0400 Received: from grover.sesame (FL1-122-131-185-176.osk.mesh.ad.jp [122.131.185.176]) (authenticated) by conuserg-07.nifty.com with ESMTP id v79Ghj8s020252; Thu, 10 Aug 2017 01:43:45 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v79Ghj8s020252 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1502297026; bh=gz8kIP8h2s4Uc5v4MFJ7ZyCmT+L0I6qe9ifAzTQIQkg=; h=From:To:Cc:Subject:Date:From; b=oqB3S7CMBkln5M+oW1rkUr/xgcdXYv2/jVdchGj/mHvA4fzbr2p4dT6P90kYeRNBb kq156JNTw5/33x602xOcZH6UDylesFu97d99RI4d3vk5C55iM/U0W3Ggdd9eCN40HG nCDwaM86zQjZcKHDZRPApJxksPRoiJQaFM4vaIzL4WYYJQSv40goQ+Wwybn9+Ndlpk dfQpWcAL/Ogo8wjKZUfVV0zyjR2cgnAAUGPJkmfpfjCwfI7e6b+ha7UCkeroqcmEqm NaXbhVHqpfmFQaCKOzxZ5uT3bYzjSqV9Z5haSpdxreBoEEMQd4n4xsevbeBISs6Eyk 39U7hCTOya6cA== X-Nifty-SrcIP: [122.131.185.176] From: Masahiro Yamada To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Masahiro Yamada Subject: [PATCH 1/6] ARM: dts: uniphier: remove sLD3 SoC support Date: Thu, 10 Aug 2017 01:43:26 +0900 Message-Id: <1502297011-30201-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/uniphier-sld3-ref.dts | 75 --------- arch/arm/boot/dts/uniphier-sld3.dtsi | 260 -------------------------------- 3 files changed, 336 deletions(-) delete mode 100644 arch/arm/boot/dts/uniphier-sld3-ref.dts delete mode 100644 arch/arm/boot/dts/uniphier-sld3.dtsi -- 2.7.4 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 4b17f35dc9a7..ccf5b1da1948 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -970,7 +970,6 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-pro4-sanji.dtb \ uniphier-pxs2-gentil.dtb \ uniphier-pxs2-vodka.dtb \ - uniphier-sld3-ref.dtb \ uniphier-sld8-ref.dtb dtb-$(CONFIG_ARCH_VERSATILE) += \ versatile-ab.dtb \ diff --git a/arch/arm/boot/dts/uniphier-sld3-ref.dts b/arch/arm/boot/dts/uniphier-sld3-ref.dts deleted file mode 100644 index 70cda39a3dd2..000000000000 --- a/arch/arm/boot/dts/uniphier-sld3-ref.dts +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Device Tree Source for UniPhier sLD3 Reference Board - * - * Copyright (C) 2015-2016 Socionext Inc. - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) - */ - -/dts-v1/; -/include/ "uniphier-sld3.dtsi" -/include/ "uniphier-ref-daughter.dtsi" -/include/ "uniphier-support-card.dtsi" - -/ { - model = "UniPhier sLD3 Reference Board"; - compatible = "socionext,uniphier-sld3-ref", "socionext,uniphier-sld3"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - }; - - memory@8000000 { - device_type = "memory"; - reg = <0x80000000 0x20000000 - 0xc0000000 0x20000000>; - }; -}; - -ðsc { - interrupts = <0 49 4>; -}; - -&serial0 { - status = "okay"; -}; - -&serial1 { - status = "okay"; -}; - -&serial2 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - -&usb2 { - status = "okay"; -}; - -&usb3 { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/uniphier-sld3.dtsi b/arch/arm/boot/dts/uniphier-sld3.dtsi deleted file mode 100644 index 408287936613..000000000000 --- a/arch/arm/boot/dts/uniphier-sld3.dtsi +++ /dev/null @@ -1,260 +0,0 @@ -/* - * Device Tree Source for UniPhier sLD3 SoC - * - * Copyright (C) 2015-2016 Socionext Inc. - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) - */ - -/ { - compatible = "socionext,uniphier-sld3"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - enable-method = "psci"; - next-level-cache = <&l2>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - enable-method = "psci"; - next-level-cache = <&l2>; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - clocks { - refclk: ref { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24576000>; - }; - - arm_timer_clk: arm_timer_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - interrupt-parent = <&intc>; - - timer@20000200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x20000200 0x20>; - interrupts = <1 11 0x304>; - clocks = <&arm_timer_clk>; - }; - - timer@20000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x20000600 0x20>; - interrupts = <1 13 0x304>; - clocks = <&arm_timer_clk>; - }; - - intc: interrupt-controller@20001000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x20001000 0x1000>, - <0x20000100 0x100>; - }; - - l2: l2-cache@500c0000 { - compatible = "socionext,uniphier-system-cache"; - reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, - <0x506c0000 0x400>; - interrupts = <0 174 4>, <0 175 4>; - cache-unified; - cache-size = <(512 * 1024)>; - cache-sets = <256>; - cache-line-size = <128>; - cache-level = <2>; - }; - - serial0: serial@54006800 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006800 0x40>; - interrupts = <0 33 4>; - clocks = <&sys_clk 0>; - }; - - serial1: serial@54006900 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006900 0x40>; - interrupts = <0 35 4>; - clocks = <&sys_clk 0>; - }; - - serial2: serial@54006a00 { - compatible = "socionext,uniphier-uart"; - status = "disabled"; - reg = <0x54006a00 0x40>; - interrupts = <0 37 4>; - clocks = <&sys_clk 0>; - }; - - i2c0: i2c@58400000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58400000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 41 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - i2c1: i2c@58480000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58480000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 42 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - i2c2: i2c@58500000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58500000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 43 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - i2c3: i2c@58580000 { - compatible = "socionext,uniphier-i2c"; - status = "disabled"; - reg = <0x58580000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 44 1>; - clocks = <&sys_clk 1>; - clock-frequency = <100000>; - }; - - /* chip-internal connection for DMD */ - i2c4: i2c@58600000 { - compatible = "socionext,uniphier-i2c"; - reg = <0x58600000 0x40>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <0 45 1>; - clocks = <&sys_clk 1>; - clock-frequency = <400000>; - }; - - system_bus: system-bus@58c00000 { - compatible = "socionext,uniphier-system-bus"; - status = "disabled"; - reg = <0x58c00000 0x400>; - #address-cells = <2>; - #size-cells = <1>; - }; - - smpctrl@59801000 { - compatible = "socionext,uniphier-smpctrl"; - reg = <0x59801000 0x400>; - }; - - mioctrl@59810000 { - compatible = "socionext,uniphier-sld3-mioctrl", - "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - mio_clk: clock { - compatible = "socionext,uniphier-sld3-mio-clock"; - #clock-cells = <1>; - }; - - mio_rst: reset { - compatible = "socionext,uniphier-sld3-mio-reset"; - #reset-cells = <1>; - }; - }; - - usb0: usb@5a800100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a800100 0x100>; - interrupts = <0 80 4>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, - <&mio_rst 12>; - }; - - usb1: usb@5a810100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a810100 0x100>; - interrupts = <0 81 4>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, - <&mio_rst 13>; - }; - - usb2: usb@5a820100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a820100 0x100>; - interrupts = <0 82 4>; - clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, - <&mio_rst 14>; - }; - - usb3: usb@5a830100 { - compatible = "socionext,uniphier-ehci", "generic-ehci"; - status = "disabled"; - reg = <0x5a830100 0x100>; - interrupts = <0 83 4>; - clocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>; - resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>, - <&mio_rst 15>; - }; - - sysctrl@f1840000 { - compatible = "socionext,uniphier-sld3-sysctrl", - "simple-mfd", "syscon"; - reg = <0xf1840000 0x10000>; - - sys_clk: clock { - compatible = "socionext,uniphier-sld3-clock"; - #clock-cells = <1>; - }; - - sys_rst: reset { - compatible = "socionext,uniphier-sld3-reset"; - #reset-cells = <1>; - }; - }; - }; -};