From patchwork Wed Aug 2 16:11:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 109244 Delivered-To: patch@linaro.org Received: by 10.182.45.195 with SMTP id p3csp6412631obm; Wed, 2 Aug 2017 09:11:50 -0700 (PDT) X-Received: by 10.84.232.79 with SMTP id f15mr25813687pln.172.1501690310023; Wed, 02 Aug 2017 09:11:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1501690310; cv=none; d=google.com; s=arc-20160816; b=LWb6x5M/1XNlWvLjeHc6fujdKQcgH+lpGszLquUD7cwI/Ep4Vm0dH2RFpbzU67YCZu VkQ1lF1OSKbPZIjiyLO2dg+6oM+8wbmXisHE/cdtuJ7leuStHbLyGi7GRXb/iUZxp4VM mWmr65Mz9Fwl1kuDItoe52o6a7/YlBxL5soHO5wx5Bizh/kSKFPiEUnRh7QUcoe9hNFe 5EubsZX81Z2w7tl6G4jBEnEohm39PzmaW8h9wf1eYbqawaDMVxNhys2H7LBxN7/QGwX7 cyBSqo4Q2hEhaMaKWstspjWhBsepWYJIfCDhpNzWX6v97UKGe6JUYb9B2tmpCyw8NMXG 1NuA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Bm8NipJXFKvRrpg/t/3m0Ptnb0ZB58MEeS5BORaLTAI=; b=Iz3OmzDOXWX4tJYI1uisN/qlBaG6XRhwnGGZC5pPBu1JwJvfpsT/T77j/aBGlEUL+q cjRJY8/8R1SzKWjI5URkYMb43eeWZUqyU+jgJh1M3HIpod6EMKFeV1IlG+YQkRQqnVkW vVlxlWCUXv+SiFQwZlrS+iTTiw4kgoQ4hHbNVQpZv7KzaSdX+CE1uD6iiCxCSBx3wrSR j28FfVC8SETzMstoCUbCwFYlFTANrvgDfyZLnygjr2lq3KSWY+/UWjMsz8+1g4zAnhRz MMj9qlD1j3GyJ3ncdjmQRiYm6//WPkuPWTtghfJXyey+YFNDlI633/eNbDnuf/3beILD jPyw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e1si19656868pgc.775.2017.08.02.09.11.49; Wed, 02 Aug 2017 09:11:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752943AbdHBQLr (ORCPT + 25 others); Wed, 2 Aug 2017 12:11:47 -0400 Received: from foss.arm.com ([217.140.101.70]:56392 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752222AbdHBQLq (ORCPT ); Wed, 2 Aug 2017 12:11:46 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DCB5615A2; Wed, 2 Aug 2017 09:11:45 -0700 (PDT) Received: from e107155-lin.cambridge.arm.com (unknown [10.1.211.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C27C93F577; Wed, 2 Aug 2017 09:11:44 -0700 (PDT) From: Sudeep Holla To: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Cc: Joerg Roedel , Sudeep Holla , Robin Murphy Subject: [PATCH -next] iommu/of: Check for valid fwspec after of_pci_iommu_init Date: Wed, 2 Aug 2017 17:11:40 +0100 Message-Id: <1501690300-5447-1-git-send-email-sudeep.holla@arm.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The successful return from of_pci_iommu_init doesn't ensure valid fwspec if it's IOMMU is disabled. Accessing dev->iommu_fwspec->ops without checking dev->iommu_fwspec could result in NULL pointer dereference. Unable to handle kernel NULL pointer dereference at virtual address 00000000 task: ffff800976880000 task.stack: ffff800976888000 PC is at of_iommu_configure+0x130/0x138 LR is at of_iommu_configure+0x118/0x138 of_iommu_configure+0x130/0x138 of_dma_configure+0xa8/0x190 dma_configure+0x40/0xe8 driver_probe_device+0x190/0x2d0 __device_attach_driver+0x9c/0xf8 bus_for_each_drv+0x58/0x98 __device_attach+0xc4/0x138 device_attach+0x10/0x18 pci_bus_add_device+0x4c/0xa8 pci_bus_add_devices+0x44/0x90 pci_bus_add_devices+0x74/0x90 pci_host_common_probe+0x14c/0x3a8 gen_pci_probe+0x2c/0x38 platform_drv_probe+0x58/0xc0 driver_probe_device+0x214/0x2d0 __driver_attach+0xac/0xb0 bus_for_each_dev+0x60/0xa0 driver_attach+0x20/0x28 bus_add_driver+0x110/0x230 driver_register+0x60/0xf8 __platform_driver_register+0x44/0x50 gen_pci_driver_init+0x18/0x20 do_one_initcall+0x38/0x120 kernel_init_freeable+0x184/0x224 kernel_init+0x10/0x100 This patch adds the check for dev->iommu_fwspec and fixes the above. Fixes: d87beb749281 ("iommu/of: Handle PCI aliases properly") Cc: Robin Murphy Signed-off-by: Sudeep Holla --- drivers/iommu/of_iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Hi Robin, I see this crash on Juno with linux-next. Enabling PCIe SMMU fixes the issue, but we may need to handle the disabled SMMU case to continue to work with old DTBs. Regards, Sudeep -- 2.7.4 diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 34160e7a8dd7..11e08ff2db57 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -200,7 +200,8 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, of_pci_iommu_init, &info); if (err) /* err > 0 means the walk stopped, but non-fatally */ ops = ERR_PTR(min(err, 0)); - else /* success implies both fwspec and ops are now valid */ + /* success may not imply fwspec is valid */ + else if (dev->iommu_fwspec) ops = dev->iommu_fwspec->ops; } else { struct of_phandle_args iommu_spec;