From patchwork Wed Jul 19 16:01:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 108307 Delivered-To: patch@linaro.org Received: by 10.182.45.195 with SMTP id p3csp1012244obm; Wed, 19 Jul 2017 09:03:30 -0700 (PDT) X-Received: by 10.98.205.69 with SMTP id o66mr561274pfg.173.1500480210629; Wed, 19 Jul 2017 09:03:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500480210; cv=none; d=google.com; s=arc-20160816; b=wb9vHrwXwf20xtswyAj93quZwnedSlvynm/K0mPDJXcxPSERksyglCt0nCNnj3+6Ey /YQ7wgqNlms4yCis0M37F/MnbYc9+67jTIDXxhnheygeIq0RJ1cBNP7AnYszPEKZVbDS TUDZ41w2J6iYFiRizSqMzw8olLSCFi3D3ePY0Q5TS+En8DlbJ0t3aiwLUFEOtVC78sMU I4SuvQrz5S/UveYpCRvmUbyDZdSqFEokunxcAoWjuswLKe6rxq8zyA4uHK49YlCG8Rxc +SxJAK2iJjb8xaxYd8Wj5WmXyOr5vUT6KgF5dvq/Y4XdPSgcfvalWQlEn5afjsnaOr95 heZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=q/XwlFjBoavp6idauAIDb8eWE4wneAtkCXMh92/vVSg=; b=YK0BkdxhXT95fVcLi6iHr+jwPmVDWnSi8NvQicnP/yw3cqNOAW6om8ECfQ3OHOeyg2 M13yA2GlUqMwyiJdCFz8G22W+nXulFm8HCTiPRG2/GByivLVeB3FcpbiznOPfk+M6etO 9aFi8M0XmQP337itpcri4nh1XeCbGjzNnSCl81yEWcwTiLdxQHzUBKCKhyN+yBvtKAHe cb4LFsLmjWbIULx/M53cnVbvbcPNZf3aDGayJp3Wt6QgZaUiwUdCWIhYhyDe3q+zYccA LHWibQTaU/ICUgZgDiqY5nAAiq2NGcsln7bggXLczShuWgJ5XL09X8lORws5spOlHlnd Izxw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m12si78402pln.563.2017.07.19.09.03.30; Wed, 19 Jul 2017 09:03:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755578AbdGSQD1 (ORCPT + 25 others); Wed, 19 Jul 2017 12:03:27 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:42410 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755538AbdGSQDX (ORCPT ); Wed, 19 Jul 2017 12:03:23 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2511915BF; Wed, 19 Jul 2017 09:03:23 -0700 (PDT) Received: from leverpostej.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C1FCB3F577; Wed, 19 Jul 2017 09:03:20 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: arnd@arndb.de, catalin.marinas@arm.com, christoffer.dall@linaro.org, Dave.Martin@arm.com, jiong.wang@arm.com, kvmarm@lists.cs.columbia.edu, linux-arch@vger.kernel.org, marc.zyngier@arm.com, mark.rutland@arm.com, suzuki.poulose@arm.com, will.deacon@arm.com, yao.qi@arm.com, linux-kernel@vger.kernel.org, kernel-hardening@lists.openwall.com Subject: [PATCH 11/11] arm64: docs: document pointer authentication Date: Wed, 19 Jul 2017 17:01:32 +0100 Message-Id: <1500480092-28480-12-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500480092-28480-1-git-send-email-mark.rutland@arm.com> References: <1500480092-28480-1-git-send-email-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we've added code to support pointer authentication, add some documentation so that people can figure out if/how to use it. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Jiong Wang Cc: Will Deacon Cc: Yao Qi --- Documentation/arm64/booting.txt | 8 +++ Documentation/arm64/elf_hwcaps.txt | 5 ++ Documentation/arm64/pointer-authentication.txt | 85 ++++++++++++++++++++++++++ 3 files changed, 98 insertions(+) create mode 100644 Documentation/arm64/pointer-authentication.txt -- 1.9.1 diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt index 8d0df62..8df9f46 100644 --- a/Documentation/arm64/booting.txt +++ b/Documentation/arm64/booting.txt @@ -205,6 +205,14 @@ Before jumping into the kernel, the following conditions must be met: ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b0. - The DT or ACPI tables must describe a GICv2 interrupt controller. + For CPUs with pointer authentication functionality: + - If EL3 is present: + SCR_EL3.APK (bit 16) must be initialised to 0b1 + SCR_EL3.API (bit 17) must be initialised to 0b1 + - If the kernel is entered at EL1: + HCR_EL2.APK (bit 40) must be initialised to 0b1 + HCR_EL2.API (bit 41) must be initialised to 0b1 + The requirements described above for CPU mode, caches, MMUs, architected timers, coherency and system registers apply to all CPUs. All CPUs must enter the kernel in the same exception level. diff --git a/Documentation/arm64/elf_hwcaps.txt b/Documentation/arm64/elf_hwcaps.txt index 7bc2921..91c4441 100644 --- a/Documentation/arm64/elf_hwcaps.txt +++ b/Documentation/arm64/elf_hwcaps.txt @@ -131,3 +131,8 @@ HWCAP_LRCPC Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001. +HWCAP_APIA + + EL0 AddPac and Auth functionality using APIAKey_EL1 is enabled, as + described by Documentation/arm64/pointer-authentication.txt. + diff --git a/Documentation/arm64/pointer-authentication.txt b/Documentation/arm64/pointer-authentication.txt new file mode 100644 index 0000000..e9b5c6b --- /dev/null +++ b/Documentation/arm64/pointer-authentication.txt @@ -0,0 +1,85 @@ +Pointer authentication in AArch64 Linux +======================================= + +Author: Mark Rutland +Date: 2017-07-19 + +This document briefly describes the provision of pointer authentication +functionality in AArch64 Linux. + + +Architecture overview +--------------------- + +The ARMv8.3 Pointer Authentication extension adds primitives that can be +used to mitigate certain classes of attack where an attacker can corrupt +the contents of some memory (e.g. the stack). + +The extension uses a Pointer Authentication Code (PAC) to determine +whether pointers have been modified unexpectedly. A PAC is derived from +a pointer, another value (such as the stack pointer), and a secret key +held in system registers. + +The extension adds instructions to insert a valid PAC into a pointer, +and to verify/remove the PAC from a pointer. The PAC occupies a number +of high-order bits of the pointer, which varies dependent on the +configured virtual address size and whether pointer tagging is in use. + +A subset of these instructions have been allocated from the HINT +encoding space. In the absence of the extension (or when disabled), +these instructions behave as NOPs. Applications and libraries using +these instructions operate correctly regardless of the presence of the +extension. + + +Basic support +------------- + +When CONFIG_ARM64_POINTER_AUTHENTICATION is selected, and relevant HW +support is present, the kernel will assign a random APIAKey value to +each process at exec*() time. This key is shared by all threads within +the process, and the key is preserved across fork(). Presence of +functionality using APIAKey is advertised via HWCAP_APIA. + +Recent versions of GCC can compile code with APIAKey-based return +address protection when passed the -msign-return-address option. This +uses instructions in the HINT space, and such code can run on systems +without the pointer authentication extension. + +The remaining instruction and data keys (APIBKey, APDAKey, APDBKey) are +reserved for future use, and instructions using these keys must not be +used by software until a purpose and scope for their use has been +decided. To enable future software using these keys to function on +contemporary kernels, where possible, instructions using these keys are +made to behave as NOPs. + +The generic key (APGAKey) is currently unsupported. Instructions using +the generic key must not be used by software. + + +Debugging +--------- + +When CONFIG_ARM64_POINTER_AUTHENTICATION is selected, and relevant HW +support is present, the kernel will expose the position of TTBR0 PAC +bits in the NT_ARM_PAC_MASK regset (struct user_pac_mask), which +userspace can acqure via PTRACE_GETREGSET. + +Separate masks are exposed for data pointers and instruction pointers, +as the set of PAC bits can vary between the two. Debuggers should not +expect that HWCAP_APIA implies the presence (or non-presence) of this +regset -- in future the kernel may support the use of APIBKey, APDAKey, +and/or APBAKey, even in the absence of APIAKey. + +Note that the masks apply to TTBR0 addresses, and are not valid to apply +to TTBR1 addresses (e.g. kernel pointers). + + +Virtualization +-------------- + +When CONFIG_ARM64_POINTER_AUTHENTICATION is selected, and uniform HW +support is present, KVM will context switch all keys used by vCPUs. +Otherwise, the feature is disabled. When disabled, accesses to keys, or +use of instructions enabled within the guest will trap to EL2, and an +UNDEFINED exception will be injected into the guest.