From patchwork Sun Jun 25 07:47:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 106298 Delivered-To: patch@linaro.org Received: by 10.140.91.2 with SMTP id y2csp944968qgd; Sun, 25 Jun 2017 00:48:50 -0700 (PDT) X-Received: by 10.101.85.202 with SMTP id k10mr8797002pgs.172.1498376930624; Sun, 25 Jun 2017 00:48:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498376930; cv=none; d=google.com; s=arc-20160816; b=kZW4WI0Q4VhEZkcq7gNBLHm42tsvNeQ60TDBJQEUpF3Dw5ehsFoatGBEJXcNSpmuUm 8FzeTmrz4hVRfDbAh5BQ03Ua7mDLFQFANsSbNac10vasyo+7w9LDas3eCAD04r913n5l +2iSpJWfcVcL8D1oXWOk4NLop/Jgt4c8ykrG0Jl4wlIbgXMwJGiZdVJS0kp733RCsHY/ RJOrXHsPawynaAyywyOiaAbQ1lLQH4cBGrZS6X7axgyQlH8eAbL7Lu2n1rfByMUmxfN0 Ra8b2fO/hOkj2x/aZUPp+j6CjhSww5HTKuPxmdO9Zb80uVoSP+JJ84v3tSQxnyM5oizi 9cQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=yVtKzdhmp4KD1obq8KEMyIhh9DrqsEzrTNfaUNXA9Tk=; b=uqNvEGzTRfzFGkxp7kZ6GhKBW7D6Nup6QaaoScnKRbxYjEG0vhbVFkxmTnwa4zGaB6 WWH+2dGvsWwXrPeuCmPxizhNS1PfXLk9PjDSrqurrjd8fok/qdZ1eRnHpnsG06tarVEU BcJt21aWJyb77XrWSOIrTGWy5YEuFx7rRVhhg1lUnJZ+MoTMM7C7qfPpjnY14tGH+DJu gwx5eXR/VcwG1pRMc4KHzNTYRzoMbuBh90PyR3SFaMkbDQAdQC74mutOIFFehjevf2dh W+AO+NX2JlmEZ3SDexnNTo8qjXGYQ4TsHbBmGr1QEac80WLofQPoOruS2UaseBhCRFX7 7XTA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 1si3689562plq.9.2017.06.25.00.48.50; Sun, 25 Jun 2017 00:48:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751544AbdFYHsX (ORCPT + 25 others); Sun, 25 Jun 2017 03:48:23 -0400 Received: from foss.arm.com ([217.140.101.70]:35016 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751242AbdFYHrz (ORCPT ); Sun, 25 Jun 2017 03:47:55 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id EF210344; Sun, 25 Jun 2017 00:47:49 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id EEA133F587; Sun, 25 Jun 2017 00:47:47 -0700 (PDT) From: Gilad Ben-Yossef To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Cc: Ofir Drang , Dan Carpenter Subject: [PATCH v3 4/6] staging: ccree: add clock management support Date: Sun, 25 Jun 2017 10:47:22 +0300 Message-Id: <1498376846-24136-5-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1498376846-24136-1-git-send-email-gilad@benyossef.com> References: <1498376846-24136-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some SoC which implement CryptoCell have a dedicated clock tied to it, some do not. Implement clock support if exists based on device tree data and tie power management to it. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/Makefile | 2 +- drivers/staging/ccree/ssi_driver.c | 43 +++++++++++++++++++++++---- drivers/staging/ccree/ssi_driver.h | 5 +++- drivers/staging/ccree/ssi_pm.c | 13 +++++---- drivers/staging/ccree/ssi_pm_ext.c | 60 -------------------------------------- drivers/staging/ccree/ssi_pm_ext.h | 33 --------------------- 6 files changed, 50 insertions(+), 106 deletions(-) delete mode 100644 drivers/staging/ccree/ssi_pm_ext.c delete mode 100644 drivers/staging/ccree/ssi_pm_ext.h -- 2.1.4 diff --git a/drivers/staging/ccree/Makefile b/drivers/staging/ccree/Makefile index 44f3e3e..318c2b3 100644 --- a/drivers/staging/ccree/Makefile +++ b/drivers/staging/ccree/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_CRYPTO_DEV_CCREE) := ccree.o -ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o ssi_pm_ext.o +ccree-y := ssi_driver.o ssi_sysfs.o ssi_buffer_mgr.o ssi_request_mgr.o ssi_cipher.o ssi_hash.o ssi_aead.o ssi_ivgen.o ssi_sram_mgr.o ssi_pm.o ccree-$(CCREE_FIPS_SUPPORT) += ssi_fips.o ssi_fips_ll.o ssi_fips_ext.o ssi_fips_local.o diff --git a/drivers/staging/ccree/ssi_driver.c b/drivers/staging/ccree/ssi_driver.c index b9d0dd27..c516675 100644 --- a/drivers/staging/ccree/ssi_driver.c +++ b/drivers/staging/ccree/ssi_driver.c @@ -57,6 +57,7 @@ #include #include #include +#include #include "ssi_config.h" #include "ssi_driver.h" @@ -219,6 +220,8 @@ static int init_cc_resources(struct platform_device *plat_dev) void __iomem *cc_base = NULL; bool irq_registered = false; struct ssi_drvdata *new_drvdata = kzalloc(sizeof(struct ssi_drvdata), GFP_KERNEL); + struct device *dev = &plat_dev->dev; + struct device_node *np = dev->of_node; u32 signature_val; int rc = 0; @@ -228,6 +231,8 @@ static int init_cc_resources(struct platform_device *plat_dev) goto init_cc_res_err; } + new_drvdata->clk = of_clk_get(np, 0); + /*Initialize inflight counter used in dx_ablkcipher_secure_complete used for count of BYSPASS blocks operations*/ new_drvdata->inflight_counter = 0; @@ -286,6 +291,10 @@ static int init_cc_resources(struct platform_device *plat_dev) new_drvdata->plat_dev = plat_dev; + rc = cc_clk_on(new_drvdata); + if (rc) + goto init_cc_res_err; + if(new_drvdata->plat_dev->dev.dma_mask == NULL) { new_drvdata->plat_dev->dev.dma_mask = & new_drvdata->plat_dev->dev.coherent_dma_mask; @@ -450,14 +459,11 @@ static void cleanup_cc_resources(struct platform_device *plat_dev) ssi_sysfs_fini(); #endif - /* Mask all interrupts */ - WRITE_REGISTER(drvdata->cc_base + CC_REG_OFFSET(HOST_RGF, HOST_IMR), - 0xFFFFFFFF); + fini_cc_regs(drvdata); + cc_clk_off(drvdata); free_irq(drvdata->res_irq->start, drvdata); drvdata->res_irq = NULL; - fini_cc_regs(drvdata); - if (drvdata->cc_base != NULL) { iounmap(drvdata->cc_base); release_mem_region(drvdata->res_mem->start, @@ -470,6 +476,33 @@ static void cleanup_cc_resources(struct platform_device *plat_dev) dev_set_drvdata(&plat_dev->dev, NULL); } +int cc_clk_on(struct ssi_drvdata *drvdata) +{ + struct clk *clk = drvdata->clk; + int rc; + + if (IS_ERR(clk)) + /* Not all devices have a clock associated with CCREE */ + return 0; + + rc = clk_prepare_enable(clk); + if (rc) + return rc; + + return 0; +} + +void cc_clk_off(struct ssi_drvdata *drvdata) +{ + struct clk *clk = drvdata->clk; + + if (IS_ERR(clk)) + /* Not all devices have a clock associated with CCREE */ + return; + + clk_disable_unprepare(clk); +} + static int cc7x_probe(struct platform_device *plat_dev) { int rc; diff --git a/drivers/staging/ccree/ssi_driver.h b/drivers/staging/ccree/ssi_driver.h index 78a327a..faf47b1 100644 --- a/drivers/staging/ccree/ssi_driver.h +++ b/drivers/staging/ccree/ssi_driver.h @@ -36,6 +36,7 @@ #include #include #include +#include /* Registers definitions from shared/hw/ree_include */ #include "dx_reg_base_host.h" @@ -148,7 +149,7 @@ struct ssi_drvdata { void *ivgen_handle; void *sram_mgr_handle; u32 inflight_counter; - + struct clk *clk; }; struct ssi_crypto_alg { @@ -193,6 +194,8 @@ void dump_byte_array(const char *name, const u8 *the_array, unsigned long size); int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe); void fini_cc_regs(struct ssi_drvdata *drvdata); +int cc_clk_on(struct ssi_drvdata *drvdata); +void cc_clk_off(struct ssi_drvdata *drvdata); #endif /*__SSI_DRIVER_H__*/ diff --git a/drivers/staging/ccree/ssi_pm.c b/drivers/staging/ccree/ssi_pm.c index 5bfbdd0..67ae1dc 100644 --- a/drivers/staging/ccree/ssi_pm.c +++ b/drivers/staging/ccree/ssi_pm.c @@ -29,7 +29,6 @@ #include "ssi_ivgen.h" #include "ssi_hash.h" #include "ssi_pm.h" -#include "ssi_pm_ext.h" #if defined (CONFIG_PM_RUNTIME) || defined (CONFIG_PM_SLEEP) @@ -52,9 +51,7 @@ int ssi_power_mgr_runtime_suspend(struct device *dev) return rc; } fini_cc_regs(drvdata); - - /* Specific HW suspend code */ - ssi_pm_ext_hw_suspend(dev); + cc_clk_off(drvdata); return 0; } @@ -66,8 +63,12 @@ int ssi_power_mgr_runtime_resume(struct device *dev) SSI_LOG_DEBUG("ssi_power_mgr_runtime_resume , unset HOST_POWER_DOWN_EN\n"); WRITE_REGISTER(drvdata->cc_base + CC_REG_OFFSET(HOST_RGF, HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE); - /* Specific HW resume code */ - ssi_pm_ext_hw_resume(dev); + + rc = cc_clk_on(drvdata); + if (rc) { + SSI_LOG_ERR("failed getting clock back on. We're toast.\n"); + return rc; + } rc = init_cc_regs(drvdata, false); if (rc !=0) { diff --git a/drivers/staging/ccree/ssi_pm_ext.c b/drivers/staging/ccree/ssi_pm_ext.c deleted file mode 100644 index 453151c..0000000 --- a/drivers/staging/ccree/ssi_pm_ext.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ - - -#include "ssi_config.h" -#include -#include -#include -#include -#include -#include "ssi_driver.h" -#include "ssi_sram_mgr.h" -#include "ssi_pm_ext.h" - -/* - * This function should suspend the HW (if possiable), It should be implemented by - * the driver user. - * The reference code clears the internal SRAM to imitate lose of state. - */ -void ssi_pm_ext_hw_suspend(struct device *dev) -{ - struct ssi_drvdata *drvdata = - (struct ssi_drvdata *)dev_get_drvdata(dev); - unsigned int val; - void __iomem *cc_base = drvdata->cc_base; - unsigned int sram_addr = 0; - - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, SRAM_ADDR), sram_addr); - - for (;sram_addr < SSI_CC_SRAM_SIZE ; sram_addr+=4) { - CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, SRAM_DATA), 0x0); - - do { - val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, SRAM_DATA_READY)); - } while (!(val &0x1)); - } -} - -/* - * This function should resume the HW (if possiable).It should be implemented by - * the driver user. - */ -void ssi_pm_ext_hw_resume(struct device *dev) -{ - return; -} - diff --git a/drivers/staging/ccree/ssi_pm_ext.h b/drivers/staging/ccree/ssi_pm_ext.h deleted file mode 100644 index dbe658b..0000000 --- a/drivers/staging/ccree/ssi_pm_ext.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2012-2017 ARM Limited or its affiliates. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see . - */ - -/* \file ssi_pm_ext.h - */ - -#ifndef __PM_EXT_H__ -#define __PM_EXT_H__ - - -#include "ssi_config.h" -#include "ssi_driver.h" - -void ssi_pm_ext_hw_suspend(struct device *dev); - -void ssi_pm_ext_hw_resume(struct device *dev); - - -#endif /*__POWER_MGR_H__*/ -