From patchwork Sun Jun 25 07:47:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 106293 Delivered-To: patch@linaro.org Received: by 10.140.91.2 with SMTP id y2csp944717qgd; Sun, 25 Jun 2017 00:47:44 -0700 (PDT) X-Received: by 10.98.138.143 with SMTP id o15mr16036622pfk.125.1498376864212; Sun, 25 Jun 2017 00:47:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498376864; cv=none; d=google.com; s=arc-20160816; b=q4Zi3uKkZ5kTB2Ev1mLSUqcbaJtFgWMHvqyevi9iH/v/UbrFYT/WIIY4seeHXCYRXo LDaKFsiDGNUTdluONKivfzW3suwLh2ktA1AYBfjK3M5ciLDK65weifvh6vWJqOJmX+gl XOeC5cvBQ6JyN/QbdU9SBK73gyKmU8ajTYv7se1CoRVHWVUKtp12PUiaa4EseA+hXO/n mB0X3J2WNVCGTehjTYE+5+m7C+xLvdELbijY0qb83u1vbi+qtvlO+KHEcYhpG05Ypu0r J+ETbuHLWtB9kX08ZvppFpFCy3RCJOeIvmtLjN0py/n2qGFxKMoaCHqiRH+PdGl0Wt4l qFdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Bd3cdTSsj+eBnldNU+uQJD0dE6GBMfIH1GRn/+0CbuU=; b=UfaKzFDfdjWRNgPo1ZR3dP+u0y6LXzGa1sNWqcMfL858b7vZVg8rovMoDzmwtAiIEn fdpeLpjfcgNLa7knbNuNKBRyhn00/Uye8iP2KCU0vEU20wEIqSBe4Mo2JHzQ893kyd9b cUg+nWPEET07VuaHtu++g0iCnZPKe1PpIneSHR+NDLEsRPXLmAuFIBm0MqHE9ABw5wHx 3VQ6/t9koqylxymg1W0WUBv3R9/JdPQoq/0m/50nqMeMvmri7hTFveZXeSxEobHaLmBq x6Ch0XonQwLXcW8XxCo6CXTqhRaSVL3Pn3tWVFSnS6HY8CctsremQLlrFxsLPufU8dm6 Z3Pw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 6si5605861pfz.398.2017.06.25.00.47.43; Sun, 25 Jun 2017 00:47:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751355AbdFYHrk (ORCPT + 25 others); Sun, 25 Jun 2017 03:47:40 -0400 Received: from foss.arm.com ([217.140.101.70]:34976 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751242AbdFYHri (ORCPT ); Sun, 25 Jun 2017 03:47:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D8DAE344; Sun, 25 Jun 2017 00:47:37 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D8D3F3F587; Sun, 25 Jun 2017 00:47:35 -0700 (PDT) From: Gilad Ben-Yossef To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Cc: Ofir Drang , Dan Carpenter Subject: [PATCH v3 1/6] staging: ccree: fix hash import/export Date: Sun, 25 Jun 2017 10:47:19 +0300 Message-Id: <1498376846-24136-2-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1498376846-24136-1-git-send-email-gilad@benyossef.com> References: <1498376846-24136-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hash import and export was saving and restoring the wrong context and therefore disabled. Fix it by restoring intermediate digest and additional state needed. The hash and mac transform now pass testmgr partial hash tests. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/ssi_hash.c | 143 +++++++++++++++++++++++++++------------ drivers/staging/ccree/ssi_hash.h | 2 + 2 files changed, 101 insertions(+), 44 deletions(-) -- 2.1.4 diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c index ed1c672..ffe8e1a 100644 --- a/drivers/staging/ccree/ssi_hash.c +++ b/drivers/staging/ccree/ssi_hash.c @@ -976,22 +976,6 @@ static int ssi_hash_init(struct ahash_req_ctx *state, struct ssi_hash_ctx *ctx) return 0; } -#ifdef EXPORT_FIXED -static int ssi_hash_export(struct ssi_hash_ctx *ctx, void *out) -{ - CHECK_AND_RETURN_UPON_FIPS_ERROR(); - memcpy(out, ctx, sizeof(struct ssi_hash_ctx)); - return 0; -} - -static int ssi_hash_import(struct ssi_hash_ctx *ctx, const void *in) -{ - CHECK_AND_RETURN_UPON_FIPS_ERROR(); - memcpy(ctx, in, sizeof(struct ssi_hash_ctx)); - return 0; -} -#endif - static int ssi_hash_setkey(void *hash, const u8 *key, unsigned int keylen, @@ -1782,23 +1766,107 @@ static int ssi_ahash_init(struct ahash_request *req) return ssi_hash_init(state, ctx); } -#ifdef EXPORT_FIXED static int ssi_ahash_export(struct ahash_request *req, void *out) { struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash); + struct device *dev = &ctx->drvdata->plat_dev->dev; + struct ahash_req_ctx *state = ahash_request_ctx(req); + u8 *curr_buff = state->buff_index ? state->buff1 : state->buff0; + u32 curr_buff_cnt = state->buff_index ? state->buff1_cnt : + state->buff0_cnt; + const u32 tmp = CC_EXPORT_MAGIC; + + CHECK_AND_RETURN_UPON_FIPS_ERROR(); - return ssi_hash_export(ctx, out); + memcpy(out, &tmp, sizeof(u32)); + out += sizeof(u32); + + dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); + memcpy(out, state->digest_buff, ctx->inter_digestsize); + out += ctx->inter_digestsize; + + if (state->digest_bytes_len_dma_addr) { + dma_sync_single_for_cpu(dev, state->digest_bytes_len_dma_addr, + HASH_LEN_SIZE, DMA_BIDIRECTIONAL); + memcpy(out, state->digest_bytes_len, HASH_LEN_SIZE); + } else { + /* Poison the unused exported digest len field. */ + memset(out, 0x5F, HASH_LEN_SIZE); + } + out += HASH_LEN_SIZE; + + memcpy(out, &curr_buff_cnt, sizeof(u32)); + out += sizeof(u32); + + memcpy(out, curr_buff, curr_buff_cnt); + + /* No sync for device ineeded since we did not change the data, + * we only copy it + */ + + return 0; } static int ssi_ahash_import(struct ahash_request *req, const void *in) { struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash); + struct device *dev = &ctx->drvdata->plat_dev->dev; + struct ahash_req_ctx *state = ahash_request_ctx(req); + u32 tmp; + int rc; + + CHECK_AND_RETURN_UPON_FIPS_ERROR(); - return ssi_hash_import(ctx, in); + memcpy(&tmp, in, sizeof(u32)); + if (tmp != CC_EXPORT_MAGIC) { + rc = -EINVAL; + goto out; + } + in += sizeof(u32); + + rc = ssi_hash_init(state, ctx); + if (rc) + goto out; + + dma_sync_single_for_cpu(dev, state->digest_buff_dma_addr, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); + memcpy(state->digest_buff, in, ctx->inter_digestsize); + in += ctx->inter_digestsize; + + if (state->digest_bytes_len_dma_addr) { + dma_sync_single_for_cpu(dev, state->digest_bytes_len_dma_addr, + HASH_LEN_SIZE, DMA_BIDIRECTIONAL); + memcpy(state->digest_bytes_len, in, HASH_LEN_SIZE); + } + in += HASH_LEN_SIZE; + + dma_sync_single_for_device(dev, state->digest_buff_dma_addr, + ctx->inter_digestsize, DMA_BIDIRECTIONAL); + + if (state->digest_bytes_len_dma_addr) + dma_sync_single_for_device(dev, + state->digest_bytes_len_dma_addr, + HASH_LEN_SIZE, DMA_BIDIRECTIONAL); + + state->buff_index = 0; + + /* Sanity check the data as much as possible */ + memcpy(&tmp, in, sizeof(u32)); + if (tmp > SSI_MAX_HASH_BLCK_SIZE) { + rc = -EINVAL; + goto out; + } + in += sizeof(u32); + + state->buff0_cnt = tmp; + memcpy(state->buff0, in, state->buff0_cnt); + +out: + return rc; } -#endif static int ssi_ahash_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) @@ -1820,6 +1888,9 @@ struct ssi_hash_template { struct ssi_drvdata *drvdata; }; +#define CC_STATE_SIZE(_x) \ + ((_x) + HASH_LEN_SIZE + SSI_MAX_HASH_BLCK_SIZE + (2 * sizeof(u32))) + /* hash descriptors */ static struct ssi_hash_template driver_hash[] = { //Asynchronize hash template @@ -1836,14 +1907,12 @@ static struct ssi_hash_template driver_hash[] = { .final = ssi_ahash_final, .finup = ssi_ahash_finup, .digest = ssi_ahash_digest, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .setkey = ssi_ahash_setkey, .halg = { .digestsize = SHA1_DIGEST_SIZE, - .statesize = sizeof(struct sha1_state), + .statesize = CC_STATE_SIZE(SHA1_DIGEST_SIZE), }, }, .hash_mode = DRV_HASH_SHA1, @@ -1862,14 +1931,12 @@ static struct ssi_hash_template driver_hash[] = { .final = ssi_ahash_final, .finup = ssi_ahash_finup, .digest = ssi_ahash_digest, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .setkey = ssi_ahash_setkey, .halg = { .digestsize = SHA256_DIGEST_SIZE, - .statesize = sizeof(struct sha256_state), + .statesize = CC_STATE_SIZE(SHA256_DIGEST_SIZE) }, }, .hash_mode = DRV_HASH_SHA256, @@ -1888,14 +1955,12 @@ static struct ssi_hash_template driver_hash[] = { .final = ssi_ahash_final, .finup = ssi_ahash_finup, .digest = ssi_ahash_digest, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .setkey = ssi_ahash_setkey, .halg = { .digestsize = SHA224_DIGEST_SIZE, - .statesize = sizeof(struct sha256_state), + .statesize = CC_STATE_SIZE(SHA224_DIGEST_SIZE), }, }, .hash_mode = DRV_HASH_SHA224, @@ -1915,14 +1980,12 @@ static struct ssi_hash_template driver_hash[] = { .final = ssi_ahash_final, .finup = ssi_ahash_finup, .digest = ssi_ahash_digest, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .setkey = ssi_ahash_setkey, .halg = { .digestsize = SHA384_DIGEST_SIZE, - .statesize = sizeof(struct sha512_state), + .statesize = CC_STATE_SIZE(SHA384_DIGEST_SIZE), }, }, .hash_mode = DRV_HASH_SHA384, @@ -1941,14 +2004,12 @@ static struct ssi_hash_template driver_hash[] = { .final = ssi_ahash_final, .finup = ssi_ahash_finup, .digest = ssi_ahash_digest, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .setkey = ssi_ahash_setkey, .halg = { .digestsize = SHA512_DIGEST_SIZE, - .statesize = sizeof(struct sha512_state), + .statesize = CC_STATE_SIZE(SHA512_DIGEST_SIZE), }, }, .hash_mode = DRV_HASH_SHA512, @@ -1968,14 +2029,12 @@ static struct ssi_hash_template driver_hash[] = { .final = ssi_ahash_final, .finup = ssi_ahash_finup, .digest = ssi_ahash_digest, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .setkey = ssi_ahash_setkey, .halg = { .digestsize = MD5_DIGEST_SIZE, - .statesize = sizeof(struct md5_state), + .statesize = CC_STATE_SIZE(MD5_DIGEST_SIZE), }, }, .hash_mode = DRV_HASH_MD5, @@ -1993,13 +2052,11 @@ static struct ssi_hash_template driver_hash[] = { .finup = ssi_mac_finup, .digest = ssi_mac_digest, .setkey = ssi_xcbc_setkey, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .halg = { .digestsize = AES_BLOCK_SIZE, - .statesize = sizeof(struct aeshash_state), + .statesize = CC_STATE_SIZE(AES_BLOCK_SIZE), }, }, .hash_mode = DRV_HASH_NULL, @@ -2018,13 +2075,11 @@ static struct ssi_hash_template driver_hash[] = { .finup = ssi_mac_finup, .digest = ssi_mac_digest, .setkey = ssi_cmac_setkey, -#ifdef EXPORT_FIXED .export = ssi_ahash_export, .import = ssi_ahash_import, -#endif .halg = { .digestsize = AES_BLOCK_SIZE, - .statesize = sizeof(struct aeshash_state), + .statesize = CC_STATE_SIZE(AES_BLOCK_SIZE), }, }, .hash_mode = DRV_HASH_NULL, diff --git a/drivers/staging/ccree/ssi_hash.h b/drivers/staging/ccree/ssi_hash.h index 7c94661..0bb99cb 100644 --- a/drivers/staging/ccree/ssi_hash.h +++ b/drivers/staging/ccree/ssi_hash.h @@ -39,6 +39,8 @@ #define XCBC_MAC_K2_OFFSET 16 #define XCBC_MAC_K3_OFFSET 32 +#define CC_EXPORT_MAGIC 0xC2EE1070U + // this struct was taken from drivers/crypto/nx/nx-aes-xcbc.c and it is used for xcbc/cmac statesize struct aeshash_state { u8 state[AES_BLOCK_SIZE];