From patchwork Wed Jun 14 12:39:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 105515 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp273555qgd; Wed, 14 Jun 2017 05:46:36 -0700 (PDT) X-Received: by 10.99.95.147 with SMTP id t141mr101788pgb.263.1497444396396; Wed, 14 Jun 2017 05:46:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497444396; cv=none; d=google.com; s=arc-20160816; b=Yc7K139rqeQQKwo6pnI3GJwosVZPzhXJD1EdEtXA9dWxveR+AaaMoukqtVg8YDwnYI +YTEmnn47nk3RPzXl+ZmZjXyIoXzI7dklhrrGKV4KAI9J745mLwHJ2YKFdMRMdlh1O1Z 7XTK8a6Jge+GP6Pi1yA600jhnR5kx9COwp3vqO1ZYhLXxZzd6OUK84iLAVVlKwBo2V3M EtSr3+ZGyKfvJeupgfuzxdZQM9AClfKCCWhkQx9Xsl1hstIWA5FdhOc3PTx2K57SCerb SFW8YIEGCqXNM9DotWyUDZw4J/FOP5+c8buYQstxcI/aC/71jVH7C8rE7/Hj86OyXrxw UmZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=1xTO4zD5ALxVAtgfB46mDqibTY7cA5Bg9fMA4t03wFY=; b=kXMt0LadEbVTSsJndjP4c6G6BKsQajcUicflNBwxV7niWq13VrX6mSizs68Qk/m+sV lZtMzYGOEIg1AwvOU2H+dshWYx9q7l6olsPIg9ejFsEMso61Z9OTz8Zpzd1q9LMlB5Nh IIikX/GxRToI1aQDAUs0D1bU/TIe/ioaRGbQ037P0IDYTiITBeCBN5aC5PLcjtpFepRL Tl1X+nmu1J0kLLZJO2m5J/BfkJlLsCH1tIYJGXQXUcvshimyQnouZp5G/0I5OhSx5njN yHzbBIMGh1lzBnGQDrjp/M649mw8EZWF0a7Kj9Q8CWQvqcLXAr8P84DhbeJS3lG8Zshn j5Fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=hpdfkHip; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n1si633731pld.62.2017.06.14.05.46.36; Wed, 14 Jun 2017 05:46:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=hpdfkHip; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752676AbdFNMqG (ORCPT + 25 others); Wed, 14 Jun 2017 08:46:06 -0400 Received: from mail-wr0-f178.google.com ([209.85.128.178]:35692 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752447AbdFNMlB (ORCPT ); Wed, 14 Jun 2017 08:41:01 -0400 Received: by mail-wr0-f178.google.com with SMTP id q97so188222318wrb.2 for ; Wed, 14 Jun 2017 05:41:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1xTO4zD5ALxVAtgfB46mDqibTY7cA5Bg9fMA4t03wFY=; b=hpdfkHipXW3T5R9LkXhJ9THgke0nhqWyj3imbn/kf8JTKZpyEBdUNKpHOPEPIfbhKo CpsoJPD9xy2coV0VJuShuj4SCrllUI0W+IcXkoCIRc+iPtZIgwEM3vmMk85Evv0q5pxB QdYgqhrgu7PiUa9jV0aJ+fzK6lQxRBV2+330I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1xTO4zD5ALxVAtgfB46mDqibTY7cA5Bg9fMA4t03wFY=; b=fuDQIYUwZJDorhphCkZo6haE6zl9nhf1n/sIkF4iTH92Ab3dFPSNv1P3jqNqx7aKWO gcSvFMicsCkyf0zuaW59Y0O9Eh9SIyQk8ZDRfFMZuQB5sAoZ5Fyk2mSmlxhfVKwsKvKC 3Tp57j94wlnhZYdJxcLFj1UFJZwA5DAGL+s2SoWsxcOG9sDzqQTB2/DufT6V1bsQfFci owFq6vXxXYSMZ3o0taXHfLL3HPivhwtQ74DuDKwkIFP3OcUQ5j/1e/JVFuxpZ7d84BI7 BZ+I0CVtcfkrGk2Aq43858UzUDM36sR81qNmWSrkflOykfy2QU89PGW/wG6y5IkjnBzp rmRg== X-Gm-Message-State: AKS2vOxseCu0Yxl+jG96I+ivXhArHLEvLxC/K3GnjzrNK43Su8aDQr2w TsnKVw2+//SI+PeE X-Received: by 10.223.179.86 with SMTP id k22mr385811wrd.5.1497444060270; Wed, 14 Jun 2017 05:41:00 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:19a:b336:54d7:46e9]) by smtp.gmail.com with ESMTPSA id 80sm1457015wmg.17.2017.06.14.05.40.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 05:40:59 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Linus Walleij , Joel Stanley , Jonas Jensen Subject: [PATCH 04/23] clocksource/drivers/fttmr010: Drop Gemini specifics Date: Wed, 14 Jun 2017 14:39:25 +0200 Message-Id: <1497443984-12371-4-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497443984-12371-1-git-send-email-daniel.lezcano@linaro.org> References: <20170614123800.GH2261@mai> <1497443984-12371-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Linus Walleij The Gemini now has a proper clock driver and a proper PCLK assigned in its device tree. Drop the Gemini-specific hacks to look up the system speed and rely on the clock framework like everyone else. Cc: Joel Stanley Tested-by: Jonas Jensen Signed-off-by: Linus Walleij Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-fttmr010.c | 103 ++++++++--------------------------- 1 file changed, 22 insertions(+), 81 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c index 58ce017..db097db 100644 --- a/drivers/clocksource/timer-fttmr010.c +++ b/drivers/clocksource/timer-fttmr010.c @@ -11,8 +11,6 @@ #include #include #include -#include -#include #include #include #include @@ -179,9 +177,28 @@ static struct irqaction fttmr010_timer_irq = { .handler = fttmr010_timer_interrupt, }; -static int __init fttmr010_timer_common_init(struct device_node *np) +static int __init fttmr010_timer_init(struct device_node *np) { int irq; + struct clk *clk; + int ret; + + /* + * These implementations require a clock reference. + * FIXME: we currently only support clocking using PCLK + * and using EXTCLK is not supported in the driver. + */ + clk = of_clk_get_by_name(np, "PCLK"); + if (IS_ERR(clk)) { + pr_err("could not get PCLK\n"); + return PTR_ERR(clk); + } + ret = clk_prepare_enable(clk); + if (ret) { + pr_err("failed to enable PCLK\n"); + return ret; + } + tick_rate = clk_get_rate(clk); base = of_iomap(np, 0); if (!base) { @@ -229,81 +246,5 @@ static int __init fttmr010_timer_common_init(struct device_node *np) return 0; } - -static int __init fttmr010_timer_of_init(struct device_node *np) -{ - /* - * These implementations require a clock reference. - * FIXME: we currently only support clocking using PCLK - * and using EXTCLK is not supported in the driver. - */ - struct clk *clk; - int ret; - - clk = of_clk_get_by_name(np, "PCLK"); - if (IS_ERR(clk)) { - pr_err("could not get PCLK\n"); - return PTR_ERR(clk); - } - ret = clk_prepare_enable(clk); - if (ret) { - pr_err("failed to enable PCLK\n"); - return ret; - } - tick_rate = clk_get_rate(clk); - - return fttmr010_timer_common_init(np); -} -CLOCKSOURCE_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_of_init); - -/* - * Gemini-specific: relevant registers in the global syscon - */ -#define GLOBAL_STATUS 0x04 -#define CPU_AHB_RATIO_MASK (0x3 << 18) -#define CPU_AHB_1_1 (0x0 << 18) -#define CPU_AHB_3_2 (0x1 << 18) -#define CPU_AHB_24_13 (0x2 << 18) -#define CPU_AHB_2_1 (0x3 << 18) -#define REG_TO_AHB_SPEED(reg) ((((reg) >> 15) & 0x7) * 10 + 130) - -static int __init gemini_timer_of_init(struct device_node *np) -{ - static struct regmap *map; - int ret; - u32 val; - - map = syscon_regmap_lookup_by_phandle(np, "syscon"); - if (IS_ERR(map)) { - pr_err("Can't get regmap for syscon handle\n"); - return -ENODEV; - } - ret = regmap_read(map, GLOBAL_STATUS, &val); - if (ret) { - pr_err("Can't read syscon status register\n"); - return -ENXIO; - } - - tick_rate = REG_TO_AHB_SPEED(val) * 1000000; - pr_info("Bus: %dMHz ", tick_rate / 1000000); - - tick_rate /= 6; /* APB bus run AHB*(1/6) */ - - switch (val & CPU_AHB_RATIO_MASK) { - case CPU_AHB_1_1: - pr_cont("(1/1)\n"); - break; - case CPU_AHB_3_2: - pr_cont("(3/2)\n"); - break; - case CPU_AHB_24_13: - pr_cont("(24/13)\n"); - break; - case CPU_AHB_2_1: - pr_cont("(2/1)\n"); - break; - } - - return fttmr010_timer_common_init(np); -} -CLOCKSOURCE_OF_DECLARE(gemini, "cortina,gemini-timer", gemini_timer_of_init); +CLOCKSOURCE_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_init); +CLOCKSOURCE_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init);