From patchwork Wed Jun 14 12:39:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 105508 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp272570qgd; Wed, 14 Jun 2017 05:43:57 -0700 (PDT) X-Received: by 10.84.233.137 with SMTP id l9mr480088plk.215.1497444237077; Wed, 14 Jun 2017 05:43:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497444237; cv=none; d=google.com; s=arc-20160816; b=URBTF6aU9b7+ubij87U+qWaag673bnJsDh/1qejNsBrZmo6KGY0LvxsVvzP+rU9hFW EKKC2TJJJuwUyHOXGMwBy/8lTRfz/vQGMmM/Dx9d/DqXWX25U70JPyjhwczzLnrTLPP8 5TuJu7GUK3cDKopX57kVyMVNrqzahEemKDjej67Ek3YIH0sLGK+65fIQl03Y8Na80Xeu UBMbuDAox9W5eKQ0f0lbBPp3T2Nvk738D2ipcG9vP7m2ThXOkb/q4dAAFvLvT3zwXIb8 lUNBxUd9ySQ6wJN20AT+pd8Kj/EjEHDaEXwbtwaAgOGfAhBVG/JgbqpMBgWd0UysJSZY +Jmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=L1JOCtRxcezaRjvRMc9tbguUKmcVE4v2HTgpdejmP+o=; b=wqvInTUS8EKaEKOQpIGBLXubZJuL0Pqtkt5ZWqfyrd5/2sEopkY05DtHD+sZaYMqpv W0RFqASKOIk88dYnxITaulT3M2Xt76yxe7XMT4MCb5+A/X3CmOYo48f5Jjzm4+TE1/6u fNKkAI044KIXKHBN49Q+jx6QAFKAC8pbTV93+WG81ulzEyVornddmXFlCCdJDs3MfSlx IdcdRTgzNCxy1V6u7oNEi84LBtvcJSGiJ3ZhQT/E4DMKQQLN3fAAG7w8HJ8m4oJMGrpf NeVZRqhF8M1K6z0bMX4AFVuGG9nlk2ddMFC/G4ueiPMyAnhhPpK1DeVzTAngrMJRB0gz 4VmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=cdIylV+q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p25si422624pge.487.2017.06.14.05.43.56; Wed, 14 Jun 2017 05:43:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=cdIylV+q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752790AbdFNMnj (ORCPT + 25 others); Wed, 14 Jun 2017 08:43:39 -0400 Received: from mail-wr0-f170.google.com ([209.85.128.170]:34572 "EHLO mail-wr0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752167AbdFNMmT (ORCPT ); Wed, 14 Jun 2017 08:42:19 -0400 Received: by mail-wr0-f170.google.com with SMTP id 77so40897783wrb.1 for ; Wed, 14 Jun 2017 05:42:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=L1JOCtRxcezaRjvRMc9tbguUKmcVE4v2HTgpdejmP+o=; b=cdIylV+qWmlQj4zBJDHRlY85+CZgUOhb4MOWWoYLUyu/BttZySsWkp/CGkLYu63GjF GIvYu0S02DNGL6WSs/PyjBRyVUbQ19mHTZoo7G4b8ky90V+DSIJGaoyAJSSdcjI5uKmL t7XJavL9Z+RTwCCAjFNSvpi61qAjcolWuu3zs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=L1JOCtRxcezaRjvRMc9tbguUKmcVE4v2HTgpdejmP+o=; b=rewmecGw4wIKN+wL2CosT238CzAHlwRd/CrydoYi4T9YYZAyLit4Oa3jJs2GUufkCv TCy5TvPGf2p1KOmzN/wU/WJHNcxgrdnjgZdrDQgOHIh4plzFLc+Nowq7MRTQNmAPGqUf 3DbiO2Crzqec2O+tHOLDgyUuQdS4zxrZWydLRFBRuUIbEe91DdAKxCFI7vhUhPcSkPA1 tdJFzI1b1+0RDDKH82WImHAU/235sO+EWUUFLJK41m9RWspMwWYMZQF3lIDQIUx2sXfh cNJtAZTZUlPF8dgjm6S96UUv75+7tbo9UKgb0moaQPI8L4WxotnVwgFfQzTIJFo30f52 WslQ== X-Gm-Message-State: AKS2vOxMhCu3Pzg3FzsMzeJKBzPJ1BXN5NbzZiJuJuPpfY69W7OCvJWX ppZ81aHDa7DJPb5d X-Received: by 10.223.133.99 with SMTP id 90mr414949wrh.44.1497444138043; Wed, 14 Jun 2017 05:42:18 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:19a:b336:54d7:46e9]) by smtp.gmail.com with ESMTPSA id 80sm1457015wmg.17.2017.06.14.05.42.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 05:42:17 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Linus Walleij , Andrew Jeffery , Joel Stanley , Jonas Jensen Subject: [PATCH 22/23] clocksource/drivers/fttmr010: Implement delay timer Date: Wed, 14 Jun 2017 14:39:43 +0200 Message-Id: <1497443984-12371-22-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497443984-12371-1-git-send-email-daniel.lezcano@linaro.org> References: <20170614123800.GH2261@mai> <1497443984-12371-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Linus Walleij This timer is often used on the ARM architecture, so as with so many siblings, we can implement delay timers, removing the need for the system to calibrate jiffys at boot, and potentially handling CPU frequency scaling on targets. We cannot just protect the Kconfig with a "depends on ARM" because it is already known that different architectures are using Faraday IP blocks, so it is better to make things open-ended and use Result on boot dmesg: Switching to timer-based delay loop, resolution 40n Calibrating delay loop (skipped), value calculated using timer frequency.. 50.00 BogoMIPS (lpj=250000) This is accurately the timer frequency, 250MHz on the APB bus. Cc: Andrew Jeffery Cc: Joel Stanley Cc: Jonas Jensen Signed-off-by: Linus Walleij Tested-by: Jonas Jensen Tested-by: Andrew Jeffery Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-fttmr010.c | 35 ++++++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c index b56d7bd..0093704 100644 --- a/drivers/clocksource/timer-fttmr010.c +++ b/drivers/clocksource/timer-fttmr010.c @@ -17,6 +17,7 @@ #include #include #include +#include /* * Register definitions for the timers @@ -81,9 +82,15 @@ struct fttmr010 { bool count_down; u32 t1_enable_val; struct clock_event_device clkevt; +#ifdef CONFIG_ARM + struct delay_timer delay_timer; +#endif }; -/* A local singleton used by sched_clock, which is stateless */ +/* + * A local singleton used by sched_clock and delay timer reads, which are + * fast and stateless + */ static struct fttmr010 *local_fttmr; static inline struct fttmr010 *to_fttmr010(struct clock_event_device *evt) @@ -101,6 +108,20 @@ static u64 notrace fttmr010_read_sched_clock_down(void) return ~readl(local_fttmr->base + TIMER2_COUNT); } +#ifdef CONFIG_ARM + +static unsigned long fttmr010_read_current_timer_up(void) +{ + return readl(local_fttmr->base + TIMER2_COUNT); +} + +static unsigned long fttmr010_read_current_timer_down(void) +{ + return ~readl(local_fttmr->base + TIMER2_COUNT); +} + +#endif + static int fttmr010_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { @@ -347,6 +368,18 @@ static int __init fttmr010_common_init(struct device_node *np, bool is_aspeed) fttmr010->tick_rate, 1, 0xffffffff); +#ifdef CONFIG_ARM + /* Also use this timer for delays */ + if (fttmr010->count_down) + fttmr010->delay_timer.read_current_timer = + fttmr010_read_current_timer_down; + else + fttmr010->delay_timer.read_current_timer = + fttmr010_read_current_timer_up; + fttmr010->delay_timer.freq = fttmr010->tick_rate; + register_current_timer_delay(&fttmr010->delay_timer); +#endif + return 0; out_unmap: