From patchwork Tue Jun 13 12:45:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 105159 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp385889qgd; Tue, 13 Jun 2017 05:46:50 -0700 (PDT) X-Received: by 10.84.233.198 with SMTP id m6mr61703761pln.292.1497358009949; Tue, 13 Jun 2017 05:46:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497358009; cv=none; d=google.com; s=arc-20160816; b=hSrtuFmZY+FsdM97MmyrypPlrYP/p2FuANjmPohknW37IxlieHhxJjAbOEysTJXwwZ 2u9sisoSgEU/MECgUbWlboUcOuESAvsI/Ohs1tyg+uSQ1INdR0/g7nhJGdxAnEjv4BbN 2z2emaDFK4PJnlqsMNF2rN8JZGe+X2YWhuk3uVSgV7qSAtQmHXdY5xeUE0rLNTybcxCK 1iohVExKDor/iuFS4HJ2NGlxBgdO4NzWy32B77fJq558il2m+XCzO07VO1AZwU0VuJ0Z Nxz63tjH7PNR/39g72BvqVQS92lDT+k22scY83CfN64hIxGgttd3ZY5FavUSZDQs3nIo BeRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=roIz4K7/F9VfJLnV72OyPBCiEEjfZEUj0ARGSQ0rYck=; b=W77SqEQP+XjuObYVEUziKKf/76x3NEeK00GpN5TRcVvpUjpSLyD/on36Py3F7Y3L5K BqnzYklHEy8XYkWpylWtWHQsUqeKsuSkj0Xi9c+5wg3pm0teWEtZ3ekGD/OeYkYjm5Ew VeLrrTB2uWcV4ArOGo4dVD4dIj+jqhSkw+txfngsU1aqv1S4rDVUJdcm5fTs6evxVUSL TQn+tZpN9vo1ib4kRN73m3Zp78vX3Cbl7x38cOgBy9hhyIgolzJGxqOz/uvg17b/jeCi Nzg4dsx1PqOgcxT87ekyrfRqroSUmIkRoVw/mVay9mXln9Neo2CKI+JzqPnsU5/aJzGc X6Hw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j12si9569199pfa.6.2017.06.13.05.46.49; Tue, 13 Jun 2017 05:46:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753208AbdFMMqm (ORCPT + 25 others); Tue, 13 Jun 2017 08:46:42 -0400 Received: from foss.arm.com ([217.140.101.70]:47872 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752083AbdFMMql (ORCPT ); Tue, 13 Jun 2017 08:46:41 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 72570344; Tue, 13 Jun 2017 05:46:40 -0700 (PDT) Received: from leverpostej.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AE3563F41F; Tue, 13 Jun 2017 05:46:39 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Mark Rutland , Will Deacon Subject: [PATCH] drivers/perf: commonise PERF_EVENTS dependency Date: Tue, 13 Jun 2017 13:45:51 +0100 Message-Id: <1497357951-17292-1-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All PMU drivers are going to depend on PERF_EVENTS, so let's make this dependency common and simplify the individual Kconfig entries. Signed-off-by: Mark Rutland Cc: Will Deacon --- drivers/perf/Kconfig | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) -- 1.9.1 diff --git a/drivers/perf/Kconfig b/drivers/perf/Kconfig index aa587ed..e5197ff 100644 --- a/drivers/perf/Kconfig +++ b/drivers/perf/Kconfig @@ -3,9 +3,10 @@ # menu "Performance monitor support" + depends on PERF_EVENTS config ARM_PMU - depends on PERF_EVENTS && (ARM || ARM64) + depends on ARM || ARM64 bool "ARM PMU framework" default y help @@ -18,7 +19,7 @@ config ARM_PMU_ACPI config QCOM_L2_PMU bool "Qualcomm Technologies L2-cache PMU" - depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI + depends on ARCH_QCOM && ARM64 && ACPI help Provides support for the L2 cache performance monitor unit (PMU) in Qualcomm Technologies processors. @@ -27,7 +28,7 @@ config QCOM_L2_PMU config QCOM_L3_PMU bool "Qualcomm Technologies L3-cache PMU" - depends on ARCH_QCOM && ARM64 && PERF_EVENTS && ACPI + depends on ARCH_QCOM && ARM64 && ACPI select QCOM_IRQ_COMBINER help Provides support for the L3 cache performance monitor unit (PMU) @@ -36,7 +37,7 @@ config QCOM_L3_PMU monitoring L3 cache events. config XGENE_PMU - depends on PERF_EVENTS && ARCH_XGENE + depends on ARCH_XGENE bool "APM X-Gene SoC PMU" default n help