From patchwork Tue Jun 13 05:03:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103694 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp236037qgd; Mon, 12 Jun 2017 22:07:16 -0700 (PDT) X-Received: by 10.98.220.193 with SMTP id c62mr54645628pfl.140.1497330436330; Mon, 12 Jun 2017 22:07:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497330436; cv=none; d=google.com; s=arc-20160816; b=k1mMHY6kPrDXhmIr9CqeKfCSRZKrSvPo/faKndeJvDxU+dTwueFZT0IdoiyGjLsmDy dJ0cpM3qQxP6fpaQbAA4bPabT3l51emYvxZ7ZB1S19A0fr7zdQpAXmtVWfQkA5sFyRM7 arNLspbwbj9COtxL038sjIZC/Tsrxl7GaqSjP7ldsVjoJJYOfrScLzsfCj+x52xR2TWw qiD7wJs5o+Bi0G3RG4Xi4kGakQSU3p+BxZXBHgyl0SvZ2QQ+fusm7v8dbPsMl5D9V9VJ RNyz5UgcCedRWDF1Yj2D3X5tX7AoQ1pLbuGmi6/EPOxNCgevLtsbrvEMlo7Bc8z+V++8 oheg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=M9NjZTP1c+EM0BiTqQ2i6FmXVV/MtM3btNdhU1qdlGU=; b=M7t0DhmqVcOqia3z86G27l2DGxiNzjZsX7uhD0Emj5b2sf81pWhK2ExDCQYMpeiMoe 8nj0YorhZS0xbztV4g3WiuD94qJ7sga7y8FHW5uQ0CobdPG/3Hq4Fc2XSruxQoSroDlF biFJn7d1PbNZdJttqZg/TDvJrJGyojfPBs4pC0YFFAGBfgEH2pujeE14D/3qYOTjPc/h jKXANr3rpxyKvZfRiJerXnCLT1l7d/tgEp0AwgPy3IBlgLlfH6oU0WomY4kYff/FczWb KrgaFFweAHdp4X2N8xBUoF/+p9KsNWqLEmYmeUZRbalDocwQcZU5phyd88BNHb3/o580 7NjQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a3si8423410pld.102.2017.06.12.22.07.16; Mon, 12 Jun 2017 22:07:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752216AbdFMFGz (ORCPT + 25 others); Tue, 13 Jun 2017 01:06:55 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:46732 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752183AbdFMFGx (ORCPT ); Tue, 13 Jun 2017 01:06:53 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id v5D54ENg023096; Tue, 13 Jun 2017 14:04:17 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v5D54ENg023096 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1497330258; bh=M9NjZTP1c+EM0BiTqQ2i6FmXVV/MtM3btNdhU1qdlGU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fm4NRBuJO37HlAacFXtEpg3omyiU4ppyvlvtQev+SDemrcM2cZLzxkjim2GtXee60 FLngAHyZtHvxeVEN2Z0GIKIh/oQDVVW+y32DeXgbWt3xzs4Y0znhp/2AtDXXQ0ttrq 27HMbBk//yEw4RnUk8sslQ8zOoUZJ0HUIEnz773jMUsgzMHcnMaoqBFg70w+cr+hML KlaLxoXpWVNK0PdUOCufSPEKP0lJpeJeJtTd8YX4jJIBR7QVNb2T7Ov/Gg9bLdJO7I ar/vTB7kBDqE9JGYMvzNbNeqo4+FfBdEilOM7lqK+LyFK1CARgEnKU/z8/OoUGfIwk k6clnxScNJwLw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v6 02/18] mtd: nand: denali: remove unneeded find_valid_banks() Date: Tue, 13 Jun 2017 14:03:54 +0900 Message-Id: <1497330250-17348-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497330250-17348-1-git-send-email-yamada.masahiro@socionext.com> References: <1497330250-17348-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The function find_valid_banks() issues the Read ID (0x90) command, then compares the first byte (Manufacturer ID) of each bank with the one of bank0. This is equivalent to what nand_scan_ident() does. The number of chips is detected there, so this is unneeded. What is worse for find_valid_banks() is that, if multiple chips are connected to INTEL_CE4100 platform, it crashes the kernel by BUG(). This is what we should avoid. This function is just harmful and unneeded. Signed-off-by: Masahiro Yamada --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 47 ----------------------------------------------- drivers/mtd/nand/denali.h | 1 - 2 files changed, 48 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 7133a33b4ad3..122df4c6126d 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -338,51 +338,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali, } /* - * determines how many NAND chips are connected to the controller. Note for - * Intel CE4100 devices we don't support more than one device. - */ -static void find_valid_banks(struct denali_nand_info *denali) -{ - uint32_t id[denali->max_banks]; - int i; - - denali->total_used_banks = 1; - for (i = 0; i < denali->max_banks; i++) { - index_addr(denali, MODE_11 | (i << 24) | 0, 0x90); - index_addr(denali, MODE_11 | (i << 24) | 1, 0); - index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]); - - dev_dbg(denali->dev, - "Return 1st ID for bank[%d]: %x\n", i, id[i]); - - if (i == 0) { - if (!(id[i] & 0x0ff)) - break; /* WTF? */ - } else { - if ((id[i] & 0x0ff) == (id[0] & 0x0ff)) - denali->total_used_banks++; - else - break; - } - } - - if (denali->platform == INTEL_CE4100) { - /* - * Platform limitations of the CE4100 device limit - * users to a single chip solution for NAND. - * Multichip support is not enabled. - */ - if (denali->total_used_banks != 1) { - dev_err(denali->dev, - "Sorry, Intel CE4100 only supports a single NAND device.\n"); - BUG(); - } - } - dev_dbg(denali->dev, - "denali->total_used_banks: %d\n", denali->total_used_banks); -} - -/* * Use the configuration feature register to determine the maximum number of * banks that the hardware supports. */ @@ -439,8 +394,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) ioread32(denali->flash_reg + RDWR_EN_HI_CNT), ioread32(denali->flash_reg + CS_SETUP_CNT)); - find_valid_banks(denali); - /* * If the user specified to override the default timings * with a specific ONFI mode, we apply those changes here. diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 352d8328b94a..0e4a8965f6f1 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -326,7 +326,6 @@ struct denali_nand_info { int platform; struct nand_buf buf; struct device *dev; - int total_used_banks; int page; void __iomem *flash_reg; /* Register Interface */ void __iomem *flash_mem; /* Host Data/Command Interface */