From patchwork Wed Jun 7 11:52:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103236 Delivered-To: patch@linaro.org Received: by 10.182.29.35 with SMTP id g3csp1714814obh; Wed, 7 Jun 2017 04:55:43 -0700 (PDT) X-Received: by 10.99.120.202 with SMTP id t193mr32522923pgc.35.1496836543301; Wed, 07 Jun 2017 04:55:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496836543; cv=none; d=google.com; s=arc-20160816; b=a6Fa4uQP1sbu+BmdbjCGs66exvs7y6pHQXm48cvGJz9rUyNUzRadxD5ugJ1q1xlqyo fStFwX0+5uPyCHDePVdqtDe84u0GyUBADr9/mtihcP1H+nfEOP+cn2jnyFngv92jEMDR 5AbrpQvc6kdkKrAEvPDG6hP8e335Ow+Ro+Q1UaMOwitjzOhLfc2vpPGNEGvibD8fiPEY CGnZxOSYz+coLm5vA5aSUiN6zaIV8sagfT9Mh5+11ErTj6721pKI9IpVf/O8WymOcint gAUfvhbgSKn7pT9ikOsq1x8RWgE0jfeWIa+8obyz38J3DYLMIUy1/NcE0IWHz9PzDr/J qlHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=YUI6RJg0N9jANXL1fLoc/WOqWZ7tCMe+sQx1OwrliVg=; b=Gcf4T8jz1L46eOaW5j7pE0NGixyoWGq2bHuwOAiBQK43zpd1K9ZCWb+5/13gxIw3d4 UVD8fbL/lTbU8S71/QJps8/Z+pvVVEB2P3oHW0e2FWXONBQWIdemafcbMSgr0KZaZzju lqV7Be5LQKa/HY25TYXMV+suSY9hIpH5CpPUL9QqXOxaLxde3jqV3O6wu5TWKKHUK9dI QSsXhuSJ8yysmM+MSaEHVc0tBIfE7vEoOssYQypp+y6JksrA+mLdvIQ96GVbgJuONOEK faZE4vR7jW4/4CUgm9vVkpgKtg9TW5PG2U1ug9pM6uis0Y5iNheVVWhl24S0s51wSqy0 JMBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e186si1569105pgc.163.2017.06.07.04.55.43; Wed, 07 Jun 2017 04:55:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751702AbdFGLzd (ORCPT + 25 others); Wed, 7 Jun 2017 07:55:33 -0400 Received: from conuserg-10.nifty.com ([210.131.2.77]:42608 "EHLO conuserg-10.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751613AbdFGLz2 (ORCPT ); Wed, 7 Jun 2017 07:55:28 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-10.nifty.com with ESMTP id v57BqjZX014276; Wed, 7 Jun 2017 20:52:55 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v57BqjZX014276 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1496836376; bh=YUI6RJg0N9jANXL1fLoc/WOqWZ7tCMe+sQx1OwrliVg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bTmeBYvMf9uRiuCCjwNDLPVnu1AY7uv1fKbSICSm0Ekp5lIbslecqTzZIRAf3OMxi ljmA4qTrlYN7AOjYTht74sDzVbABhaugKsJ1mqICmSTQnRXx8TQ7Qxve9bf93NjuM7 BEVACGX7MzeyH49A9B3T+vWlPXXQQPoJN83OftIOyOLJ2IVhYFncQrHDs1LYrFcAS6 AHr3/fp46ZaiHD8ijF1eHFSYHdEuKWQivfLadfFUVxplzM+O5JxuNfBXdkIC9B2aBJ tGd9HvmiS5jHnC5uLqHFgvhQonvpIiBtZOIEutesQFu6BGjMLaITzNw3cwq6TCqDmR Rkl5WMckhm/Kw== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v5 08/23] mtd: nand: denali: remove unneeded find_valid_banks() Date: Wed, 7 Jun 2017 20:52:17 +0900 Message-Id: <1496836352-8016-9-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496836352-8016-1-git-send-email-yamada.masahiro@socionext.com> References: <1496836352-8016-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The function find_valid_banks() issues the Read ID (0x90) command, then compares the first byte (Manufacturer ID) of each bank with the one of bank0. This is equivalent to what nand_scan_ident() does. The number of chips is detected there, so this is unneeded. What is worse for find_valid_banks() is that, if multiple chips are connected to INTEL_CE4100 platform, it crashes the kernel by BUG(). This is what we should avoid. This function is just harmful and unneeded. Signed-off-by: Masahiro Yamada --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 47 ----------------------------------------------- drivers/mtd/nand/denali.h | 1 - 2 files changed, 48 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 22acfc34b546..f090486cab66 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -338,51 +338,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali, } /* - * determines how many NAND chips are connected to the controller. Note for - * Intel CE4100 devices we don't support more than one device. - */ -static void find_valid_banks(struct denali_nand_info *denali) -{ - uint32_t id[denali->max_banks]; - int i; - - denali->total_used_banks = 1; - for (i = 0; i < denali->max_banks; i++) { - index_addr(denali, MODE_11 | (i << 24) | 0, 0x90); - index_addr(denali, MODE_11 | (i << 24) | 1, 0); - index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]); - - dev_dbg(denali->dev, - "Return 1st ID for bank[%d]: %x\n", i, id[i]); - - if (i == 0) { - if (!(id[i] & 0x0ff)) - break; /* WTF? */ - } else { - if ((id[i] & 0x0ff) == (id[0] & 0x0ff)) - denali->total_used_banks++; - else - break; - } - } - - if (denali->platform == INTEL_CE4100) { - /* - * Platform limitations of the CE4100 device limit - * users to a single chip solution for NAND. - * Multichip support is not enabled. - */ - if (denali->total_used_banks != 1) { - dev_err(denali->dev, - "Sorry, Intel CE4100 only supports a single NAND device.\n"); - BUG(); - } - } - dev_dbg(denali->dev, - "denali->total_used_banks: %d\n", denali->total_used_banks); -} - -/* * Use the configuration feature register to determine the maximum number of * banks that the hardware supports. */ @@ -439,8 +394,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) ioread32(denali->flash_reg + RDWR_EN_HI_CNT), ioread32(denali->flash_reg + CS_SETUP_CNT)); - find_valid_banks(denali); - /* * If the user specified to override the default timings * with a specific ONFI mode, we apply those changes here. diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 352d8328b94a..0e4a8965f6f1 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -326,7 +326,6 @@ struct denali_nand_info { int platform; struct nand_buf buf; struct device *dev; - int total_used_banks; int page; void __iomem *flash_reg; /* Register Interface */ void __iomem *flash_mem; /* Host Data/Command Interface */