From patchwork Mon Jun 5 23:21:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103117 Delivered-To: patch@linaro.org Received: by 10.182.29.35 with SMTP id g3csp1009586obh; Mon, 5 Jun 2017 16:29:31 -0700 (PDT) X-Received: by 10.84.238.137 with SMTP id v9mr11585863plk.154.1496705371272; Mon, 05 Jun 2017 16:29:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496705371; cv=none; d=google.com; s=arc-20160816; b=EwKCsUTg85JCSDl6Eh7Z13gwbnJgoO7Ug4dfJKi6kJgCIseL1ki5+VWvg2snOsoSAI nNOD6nFRQZkhyfxYixERTozZtEAJkhEemR7RIGzCtmmfJdWag85HjgCDasxqKNFlf0P1 jMYPYcHcUukLxbdAYvO298/UAx0hHDsKqzdJhygeh61+b9jqZCa61YwdPQuHNdsDm283 R3FAT9j+ylGP+iLWxtO+oPzZOVRAkviPYJgl+9zQ+47H/0VpNFULik0D3q85imsyj4KQ Q63HqpUp1aUvZpFsgTA+RpneA7ukmS9oT7ry+MnnD3/XHF03mwWg98mBo/mcz3IW082x aPEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=OKXdUUeiuqhfGZ5u+LL+R2zGxIGklUpMmz/CpChup5U=; b=HqFt64lOT+UL1P4x2J/Mhf9oGukcvdsuLOOCjihJRD1gA2cP5e3OB7dVyZAoLByH9L GvPGUn7rc6Z6eZs6sZLpOJpBGJLAxVw/VKCInaY6qLM1OynMHypPcUy9sbDy0MZq2ayz eNt5Ii2TE9QCqIbVZGsZ2tSPQEapkj644m5FA8SjR1q/QDq5cFaeyN9QKqeVl3hUnORl 9Zs2uAH94Z7yowPRtHUHRMFIYaR6hYl1wzPCZsH7m47g/QHPThvD0f6AxvQmeJuQqj0g dYg4825+Afd9n7y9sLAofOtf17qskaZ/EnhLrisXR7WAVxfyfNnMVznUBfFtpCSwtsZr yD2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s4si2756254pfi.251.2017.06.05.16.29.30; Mon, 05 Jun 2017 16:29:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751470AbdFEX3R (ORCPT + 25 others); Mon, 5 Jun 2017 19:29:17 -0400 Received: from conuserg-10.nifty.com ([210.131.2.77]:32143 "EHLO conuserg-10.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751289AbdFEXZR (ORCPT ); Mon, 5 Jun 2017 19:25:17 -0400 Received: from grover.sesame (FL1-118-110-19-204.osk.mesh.ad.jp [118.110.19.204]) (authenticated) by conuserg-10.nifty.com with ESMTP id v55NMD5f004412; Tue, 6 Jun 2017 08:22:33 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v55NMD5f004412 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1496704954; bh=OKXdUUeiuqhfGZ5u+LL+R2zGxIGklUpMmz/CpChup5U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iLckzanfegJJk87oUbkiGMu6ek8Pe3G/pnj7ePFzcD3v1jHkVJJfxO9SNOvt6TmZE kTQNAuyEDLLNdeH4IqPePuq+c3gDKoj+gJcMCEzNCUGctadobJEyavtXH8W6zpsRPO KGjkyvjKB4I4iwJbICWMERyQODXKtMZnBrXDXW6zriIqSTArSZYZG7VduRxUv57iiG vEbeg37gePuO2v7HWkCZs+KjOZ2Y4nf++hqL+HtesOQGhd9XHP1ETY+AXmLWwgwJsw bQVCnYY8S/zkd5t0KzXpb5nn+6qffO7wSMFLy3qjLk4yCrI0yDHJRGQhdmqyd01qu1 g+oP7jvtlJw6A== X-Nifty-SrcIP: [118.110.19.204] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , Graham Moore , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v4 05/23] mtd: nand: denali: remove Toshiba and Hynix specific fixup code Date: Tue, 6 Jun 2017 08:21:44 +0900 Message-Id: <1496704922-12261-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496704922-12261-1-git-send-email-yamada.masahiro@socionext.com> References: <1496704922-12261-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Denali IP can automatically detect device parameters such as page size, oob size, device width, etc. and this driver currently relies on it. However, this hardware function is known to be problematic. [1] Due to a hardware bug, various misdetected cases were reported. That is why get_toshiba_nand_para() and get_hynix_nand_para() exist to fix-up the misdetected parameters. It is not realistic to add a new NAND device to the *black list* every time we are hit by a misdetected case. We would never be able to guarantee that all cases are covered. [2] Because this feature is unreliable, it is disabled on some platforms. The nand_scan_ident() detects device parameters in a more tested way. The hardware should not set the device parameter registers in a different, unreliable way. Instead, set the parameters from the nand_scan_ident() back to the registers. Signed-off-by: Masahiro Yamada --- Changes in v4: None Changes in v3: None Changes in v2: None drivers/mtd/nand/denali.c | 40 ++++++---------------------------------- 1 file changed, 6 insertions(+), 34 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 3204c51..422b6e4 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -337,36 +337,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali, } } -static void get_toshiba_nand_para(struct denali_nand_info *denali) -{ - /* - * Workaround to fix a controller bug which reports a wrong - * spare area size for some kind of Toshiba NAND device - */ - if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) && - (ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) - iowrite32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); -} - -static void get_hynix_nand_para(struct denali_nand_info *denali, - uint8_t device_id) -{ - switch (device_id) { - case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */ - case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */ - iowrite32(128, denali->flash_reg + PAGES_PER_BLOCK); - iowrite32(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE); - iowrite32(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); - iowrite32(0, denali->flash_reg + DEVICE_WIDTH); - break; - default: - dev_warn(denali->dev, - "Unknown Hynix NAND (Device ID: 0x%x).\n" - "Will use default parameter values instead.\n", - device_id); - } -} - /* * determines how many NAND chips are connected to the controller. Note for * Intel CE4100 devices we don't support more than one device. @@ -453,10 +423,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) return FAIL; } else if (maf_id == 0xEC) { /* Samsung NAND */ get_samsung_nand_para(denali, device_id); - } else if (maf_id == 0x98) { /* Toshiba NAND */ - get_toshiba_nand_para(denali); - } else if (maf_id == 0xAD) { /* Hynix NAND */ - get_hynix_nand_para(denali, device_id); } dev_info(denali->dev, @@ -1638,6 +1604,12 @@ int denali_init(struct denali_nand_info *denali) chip->ecc.size, chip->ecc.strength, chip->ecc.bytes); iowrite32(chip->ecc.strength, denali->flash_reg + ECC_CORRECTION); + iowrite32(mtd->erasesize / mtd->writesize, + denali->flash_reg + PAGES_PER_BLOCK); + iowrite32(chip->options & NAND_BUSWIDTH_16 ? 1 : 0, + denali->flash_reg + DEVICE_WIDTH); + iowrite32(mtd->writesize, denali->flash_reg + DEVICE_MAIN_AREA_SIZE); + iowrite32(mtd->oobsize, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); iowrite32(chip->ecc.size, denali->flash_reg + CFG_DATA_BLOCK_SIZE); iowrite32(chip->ecc.size, denali->flash_reg + CFG_LAST_DATA_BLOCK_SIZE);