From patchwork Mon Jun 5 23:21:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103122 Delivered-To: patch@linaro.org Received: by 10.182.29.35 with SMTP id g3csp1010052obh; Mon, 5 Jun 2017 16:30:42 -0700 (PDT) X-Received: by 10.84.140.3 with SMTP id 3mr18220308pls.113.1496705442720; Mon, 05 Jun 2017 16:30:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496705442; cv=none; d=google.com; s=arc-20160816; b=gBk6cmnbcXnFhkt5UTR8wdHNNFKjehu+16G0xegYwNw7TfBoDE2zKZ++XISMJuZdWl yETFyUI2xrfpn0siCkZn0yTh+aTRLYe+1n809j+1dNfik6MBnfifGaJr9REYTTT0PQNC 4SQX2A2Ept6Fa7u1jJZn37NMLitaxYDXDJ/aRWYV+7naaOCrswpLYHqtwBsO2JPHm+9e B4iHVvC2yEKpivNRocVYv6e8BV6BpTBc+A1LZ/Sd+aS3vkj77Xbe+/PLRjB5B3B8Qyen 1EWSaL9Z17udhLJGrVsPFWBU6KMjiIIYL+J5OrecxoJ6zCqghiqWYM9RlVOrifxJTnFs 41TA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=ioHATIe0D4te+RJYsAFe1Fb/iNacXfw8H5EyHEusCc8=; b=iO06cSgOuFtFyBYijpBV0GGNDtC6P0UcJQaoKPStdefh67BGCkRvrRN0brW5Tb26D2 iVKtM+IDZDJD4Fupj/nqv0VK52B816bI+jmD/znE71VNkvn8obhO0G1JYn/A0WPcRYXn wunJKm4fxdsCdxQusMD/aJdKv39rZtRL6ZU3nkvN1AJfwEoIhq7oGim9btCxZUHxc9Wa mPmoayXHo2FbnXHWEO/9f/FUUCuoMz0WLMPkkKuw3Bn4xvlrgwIvgkhTHaDcijcbEUoN e/n2v21Gd2In3FQA9ozHv5RmqYpz6tNoACwCtjuyORQ+y3XW0SnNLYrwgDnpLFqnh8V4 gRzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a3si8396013plc.494.2017.06.05.16.30.42; Mon, 05 Jun 2017 16:30:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751357AbdFEXaL (ORCPT + 25 others); Mon, 5 Jun 2017 19:30:11 -0400 Received: from conuserg-10.nifty.com ([210.131.2.77]:32130 "EHLO conuserg-10.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751278AbdFEXZQ (ORCPT ); Mon, 5 Jun 2017 19:25:16 -0400 Received: from grover.sesame (FL1-118-110-19-204.osk.mesh.ad.jp [118.110.19.204]) (authenticated) by conuserg-10.nifty.com with ESMTP id v55NMD5q004412; Tue, 6 Jun 2017 08:22:46 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v55NMD5q004412 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1496704967; bh=ioHATIe0D4te+RJYsAFe1Fb/iNacXfw8H5EyHEusCc8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bWWN0dyWHicjtySADcQG/3no65t92pnbAd/iY7kDsqv4AdRdxr6gAwrRLEjCZezpi 1/5y7L4Ejt7WylwGyxGpgHAjsGb6mhBJ49TXne0J74ap6US5EydyaCQeQcLF3Cs6WC T4Z3Ao2tID2VDLORgbXt+er99UD032Ou161h+Q8zS1iwonHn3EvudHEy6h34hcCrak kZM9ahBAQisKAKcqwDG4IHqc+7pV6m9sfRvlTcB5Ld7ALiOOmww3tggk44PhFg0iL1 F8rqX5cJ9PRs4GAADFDE6RSrCrS+wZQfLfs07cvWv+EuPz/8pSXfEMgD+bhzzLsf4u Oz3Gy7LgJ/3Sw== X-Nifty-SrcIP: [118.110.19.204] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , Graham Moore , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v4 16/23] mtd: nand: denali: use interrupt instead of polling for bank reset Date: Tue, 6 Jun 2017 08:21:55 +0900 Message-Id: <1496704922-12261-17-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496704922-12261-1-git-send-email-yamada.masahiro@socionext.com> References: <1496704922-12261-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The current bank reset implementation polls the INTR_STATUS register until interested bits are set. This is not good because: - polling simply wastes time-slice of the thread - The while() loop may continue eternally if no bit is set, for example, due to the controller problem. The denali_wait_for_irq() uses wait_for_completion_timeout(), which is safer. We can use interrupt by moving the denali_reset_bank() call below the interrupt setup. Signed-off-by: Masahiro Yamada --- Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 775387e..6dee168 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -974,24 +974,25 @@ static int denali_setup_data_interface(struct mtd_info *mtd, static void denali_reset_banks(struct denali_nand_info *denali) { + u32 irq_status; int i; - denali_clear_irq_all(denali); - for (i = 0; i < denali->max_banks; i++) { - iowrite32(1 << i, denali->flash_reg + DEVICE_RESET); - while (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - (INTR__RST_COMP | INTR__TIME_OUT))) - cpu_relax(); - if (!(ioread32(denali->flash_reg + INTR_STATUS(i)) & - INTR__INT_ACT)) + denali->flash_bank = i; + + denali_reset_irq(denali); + + iowrite32(DEVICE_RESET__BANK(i), + denali->flash_reg + DEVICE_RESET); + + irq_status = denali_wait_for_irq(denali, + INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT); + if (!(irq_status & INTR__INT_ACT)) break; } dev_dbg(denali->dev, "%d chips connected\n", i); denali->max_banks = i; - - denali_clear_irq_all(denali); } static void denali_hw_init(struct denali_nand_info *denali) @@ -1013,7 +1014,6 @@ static void denali_hw_init(struct denali_nand_info *denali) denali->bbtskipbytes = ioread32(denali->flash_reg + SPARE_AREA_SKIP_BYTES); detect_max_banks(denali); - denali_reset_banks(denali); iowrite32(0x0F, denali->flash_reg + RB_PIN_ENABLED); iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->flash_reg + CHIP_ENABLE_DONT_CARE); @@ -1147,9 +1147,6 @@ static void denali_drv_init(struct denali_nand_info *denali) * element that might be access shared data (interrupt status) */ spin_lock_init(&denali->irq_lock); - - /* indicate that MTD has not selected a valid bank yet */ - denali->flash_bank = CHIP_SELECT_INVALID; } static int denali_multidev_fixup(struct denali_nand_info *denali) @@ -1224,6 +1221,9 @@ int denali_init(struct denali_nand_info *denali) } denali_enable_irq(denali); + denali_reset_banks(denali); + + denali->flash_bank = CHIP_SELECT_INVALID; nand_set_flash_node(chip, denali->dev->of_node); /* Fallback to the default name if DT did not give "label" property */