From patchwork Mon Jun 5 23:21:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 103113 Delivered-To: patch@linaro.org Received: by 10.182.29.35 with SMTP id g3csp1009159obh; Mon, 5 Jun 2017 16:28:01 -0700 (PDT) X-Received: by 10.99.174.77 with SMTP id e13mr23584652pgp.145.1496705281835; Mon, 05 Jun 2017 16:28:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496705281; cv=none; d=google.com; s=arc-20160816; b=ZSPChDvkuDIY3XkQlzwFLKdJKqGL/F1CHLIXST+gEF94Tf73zfWh74KWJ6TMPJGF+f WkDRuI5eWV3qJABpoBsw9ZAucaksEFos7CcnvCn2jr5TR+0RNxTHXvLr8vU8TwMYw3lr Z2r97J1F6pA5wzQShnInUHD7X1OWSPCHeFjC+bA15ko9Yxf+5dy2EWtpbzq0Ky8WOPhg sy0rJPtuTqutROLT6A9+Dpd72U29g4we6WrkD5p1aWa8q5v5yygULM7MdUUnvZOyz1Bf H+Uie6sVTC2pxQzm/uVYii0YsKlhmwtApv26iAqRTVPsbBQwGTdD+G0oFHdIjAQ41aHt xI2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=yCUlg6Ob4EhYIvjzRqgNlUoFDqU6iOh/2f8twq+jTr8=; b=u7qpSI8IphIxYhDXM2Egq3CJCN/2UTZ4nsdrXzNxqksJJSJCCSBy293A9/yPGfkjUo NR8zk5mQnqQKDEHu55olBxAYy/hVg4gPyXDM3SbWi+wYoJOcEymvnfhtP86pdEGJxH/E 82eWQdfVxlRsxopoQAXT7BP0ksdAnrZDNKgqwLI5gaF8LZsumbCHAIrWiVBkWc6DN6Zp LjqB0xdrt3NSTk2PxhGkFKCFDR3NEt3M7yEIUdIaGe9yOYjJ+gstQH2+ipEWwAFNapfQ ZabocJtDjtKibG71NzNp8ox83iu+r89z9egeX4oJp/pTRSpGHOgMOkhqwTdweai9aEuE +Kwg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b11si2641077pgr.410.2017.06.05.16.28.01; Mon, 05 Jun 2017 16:28:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751456AbdFEX1u (ORCPT + 25 others); Mon, 5 Jun 2017 19:27:50 -0400 Received: from conuserg-10.nifty.com ([210.131.2.77]:32212 "EHLO conuserg-10.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751313AbdFEXZT (ORCPT ); Mon, 5 Jun 2017 19:25:19 -0400 Received: from grover.sesame (FL1-118-110-19-204.osk.mesh.ad.jp [118.110.19.204]) (authenticated) by conuserg-10.nifty.com with ESMTP id v55NMD5j004412; Tue, 6 Jun 2017 08:22:38 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-10.nifty.com v55NMD5j004412 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1496704959; bh=yCUlg6Ob4EhYIvjzRqgNlUoFDqU6iOh/2f8twq+jTr8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ULITL8I2xT9gYAMBxoi7u+J+STmxbHWKgjw4e5ddam1BK0bNFr7oaAB942PYVjdpA Y4+1TKOajDzddsojWJbQOCP88PkTSgpLRuJSrFtgm8kYbTRzQTDWkRc1a9+i44qFem Z2eajIcCgowizbrBeLYtyUIjNJbDnA8pKPudvGldaULRCKa1gDEa7FYclCAfF7UGZh i8OzfZo8cHgQJ4k6IbOkcSCN/Gg2z9cb21NiqgkhTaHhxMh3NA1L3mjZ9y9OIVVRdY epwdL4dqEByPmXC5UB0q8ODEofB7iaFMCeCcnvPwQLUjrORooq7hzat3yDxkZKgPB/ Pq2pzBs5WoEaQ== X-Nifty-SrcIP: [118.110.19.204] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , Graham Moore , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , Cyrille Pitchen , linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger Subject: [PATCH v4 09/23] mtd: nand: denali: remove unneeded find_valid_banks() Date: Tue, 6 Jun 2017 08:21:48 +0900 Message-Id: <1496704922-12261-10-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496704922-12261-1-git-send-email-yamada.masahiro@socionext.com> References: <1496704922-12261-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The function find_valid_banks() issues the Read ID (0x90) command, then compares the first byte (Manufacturer ID) of each bank with the one of bank0. This is equivalent to what nand_scan_ident() does. The number of chips is detected there, so this is unneeded. What is worse for find_valid_banks() is that, if multiple chips are connected to INTEL_CE4100 platform, it crashes the kernel by BUG(). This is what we should avoid. This function is just harmful and unneeded. Signed-off-by: Masahiro Yamada --- Changes in v4: None Changes in v3: None Changes in v2: - Newly added drivers/mtd/nand/denali.c | 47 ----------------------------------------------- drivers/mtd/nand/denali.h | 1 - 2 files changed, 48 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 4017262..a289011 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -338,51 +338,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali, } /* - * determines how many NAND chips are connected to the controller. Note for - * Intel CE4100 devices we don't support more than one device. - */ -static void find_valid_banks(struct denali_nand_info *denali) -{ - uint32_t id[denali->max_banks]; - int i; - - denali->total_used_banks = 1; - for (i = 0; i < denali->max_banks; i++) { - index_addr(denali, MODE_11 | (i << 24) | 0, 0x90); - index_addr(denali, MODE_11 | (i << 24) | 1, 0); - index_addr_read_data(denali, MODE_11 | (i << 24) | 2, &id[i]); - - dev_dbg(denali->dev, - "Return 1st ID for bank[%d]: %x\n", i, id[i]); - - if (i == 0) { - if (!(id[i] & 0x0ff)) - break; /* WTF? */ - } else { - if ((id[i] & 0x0ff) == (id[0] & 0x0ff)) - denali->total_used_banks++; - else - break; - } - } - - if (denali->platform == INTEL_CE4100) { - /* - * Platform limitations of the CE4100 device limit - * users to a single chip solution for NAND. - * Multichip support is not enabled. - */ - if (denali->total_used_banks != 1) { - dev_err(denali->dev, - "Sorry, Intel CE4100 only supports a single NAND device.\n"); - BUG(); - } - } - dev_dbg(denali->dev, - "denali->total_used_banks: %d\n", denali->total_used_banks); -} - -/* * Use the configuration feature register to determine the maximum number of * banks that the hardware supports. */ @@ -439,8 +394,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) ioread32(denali->flash_reg + RDWR_EN_HI_CNT), ioread32(denali->flash_reg + CS_SETUP_CNT)); - find_valid_banks(denali); - /* * If the user specified to override the default timings * with a specific ONFI mode, we apply those changes here. diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 0e9297d..80767cf 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -326,7 +326,6 @@ struct denali_nand_info { int platform; struct nand_buf buf; struct device *dev; - int total_used_banks; int page; void __iomem *flash_reg; /* Register Interface */ void __iomem *flash_mem; /* Host Data/Command Interface */