From patchwork Mon Jun 5 15:22:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 102732 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp969197qgd; Mon, 5 Jun 2017 08:24:15 -0700 (PDT) X-Received: by 10.84.133.65 with SMTP id 59mr16185416plf.230.1496676254872; Mon, 05 Jun 2017 08:24:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496676254; cv=none; d=google.com; s=arc-20160816; b=n8INpD2Zt1selVznOfspFz9sms1qSlKzWoSmZ19ga0wJcnW5CTfnDXDaTNOFlNobCp eFIJDZ922mCmoF4x3DVYpaF5kljC9XeGyba/5XfSeIu9g0niX4ci9GCaO0q3XKS+eOBG iJPQtqY2h6oqmO3S9IFTOz0X8Fe0kkNBF/8BaK8DitnAcQP4euVe0CVuqmGEsXbmHdEw 0xMk3NRegRp4jAgFbHK0WWp7YSFfaAKzRrt5E0ImMF4WU86IRxqURBfXaAfU9xOaC/VY tO79aBdeJqnx1JvswwqU46GwX3Ob5ZzN894TA1ll9gE+PBS3qRGf3Bqzk06mUDZkpU0F OMFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=/ktp22+BngYhs3iGuD2IYIwUwDAU5V4W00gibrkKBX0=; b=KvUZv9DiFxX59ajLwLPFzjJHg0UdFQeXkKJZ29PRZ1j6bHLycu+1/HpLVYSvGSTfj2 wyRKOTnF2iEaBZG++gQvmTcZ1OcQdjHBaP7U/nOkPxcVovRqlkd4EnbliNToCflWkAhO +HrE6crzSj1eGxtmuwZ5OLU3mZrAWO+WVPIAQH+v3zSYszdwR2NkGPjXw+AM2n+fzGUm vrsSTOhrilvKG2ltcFfHhZPlYkNLebGCrNtXAKr6Bhk2FrCoIdVrc/gxLG8EofdHlkZr cFGxM1948x/KrEMEHx06EbSFV0O6l1srTFXRM6n/teMW6Qmbd8nabHNiDApqZVg4MF3C 0obA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d3si29342874pfa.393.2017.06.05.08.24.14; Mon, 05 Jun 2017 08:24:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751415AbdFEPXa (ORCPT + 25 others); Mon, 5 Jun 2017 11:23:30 -0400 Received: from foss.arm.com ([217.140.101.70]:34204 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751213AbdFEPWw (ORCPT ); Mon, 5 Jun 2017 11:22:52 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1A7E0165C; Mon, 5 Jun 2017 08:22:52 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DFB5E3F25D; Mon, 5 Jun 2017 08:22:51 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 7ABE81AE3667; Mon, 5 Jun 2017 16:22:58 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, mark.rutland@arm.com, kim.phillips@arm.com, tglx@linutronix.de, peterz@infradead.org, alexander.shishkin@linux.intel.com, robh@kernel.org, suzuki.poulose@arm.com, pawel.moll@arm.com, mathieu.poirier@linaro.org, mingo@redhat.com, linux-kernel@vger.kernel.org, Will Deacon Subject: [PATCH v4 5/5] dt-bindings: Document devicetree binding for ARM SPE Date: Mon, 5 Jun 2017 16:22:57 +0100 Message-Id: <1496676177-29356-6-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1496676177-29356-1-git-send-email-will.deacon@arm.com> References: <1496676177-29356-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch documents the devicetree binding in use for ARM SPE. Cc: Mark Rutland Cc: Rob Herring Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt -- 2.1.4 diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt new file mode 100644 index 000000000000..93372f2a7df9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt @@ -0,0 +1,20 @@ +* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) + +ARMv8.2 introduces the optional Statistical Profiling Extension for collecting +performance sample data using an in-memory trace buffer. + +** SPE Required properties: + +- compatible : should be one of: + "arm,statistical-profiling-extension-v1" + +- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where + SPE is only supported on a subset of the CPUs, please consult + the arm,gic-v3 binding for details on describing a PPI partition. + +** Example: + +spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = ; +};