From patchwork Sun Jun 4 08:02:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gilad Ben-Yossef X-Patchwork-Id: 101333 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp437636qgd; Sun, 4 Jun 2017 01:04:27 -0700 (PDT) X-Received: by 10.98.82.77 with SMTP id g74mr14531888pfb.115.1496563466908; Sun, 04 Jun 2017 01:04:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496563466; cv=none; d=google.com; s=arc-20160816; b=s6qLY+yaljvdfr/cmYdcebR2FaEtKP0fAUumEy2lovSZeb2fu3cqxKf7hJlDWURNVq rcUNGHRqqhycqjodmBx89c/PT4ZRna2WrWxB0q/Xb/30dB5pxY4h2/7KpAGmnvr6ayN0 0AIcPCBs4gshS1/HPGc619uDClxflhST7ee4jfdjPEtGc7cZbvbbC46I5esW34yRI48c QC7V/uc/O0N8jEwTTOMhTC6OJIU5jug6r230+MwuQh1rgKp5fwodKLKbDFJJQLss4t4e hHNhOeqSLlrfzoZSgiVAjn6zw9+edtn4SXhJVaHiYss7vWbAhepn4BOM4rma3f0g354w tgUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=Zid9xyQ5lO3ENQetjGdSnh5VURzqPPkvKg4eJr0GmEE=; b=UCuvNCdEjsc12Ccr3RILAE9llGfFru26CcOnww5ixWf7ymJitZJaOCG4NNIIk8fW6V nV0iGltEplPMR5lFRXAsAo0FIdtpno5H9ylkU04fcNfVWp4NI7+Q6+wEj2o+vQjkwCAP BDO7efjIYuDvy5v4rfuI4a+9JLPWE5Jh6uRZ0CCsfBoRwsUNPjGIXC+ZRfR/MjcWz3tN x13FhZ40sL9vxy02fYWTLXjUZwrTUMW48H7deXrabztvVZ6Rv6cOWaVyfvOa4LD+58di hg6JRcTxZ5BNTnKyZobBvpgKfA3FX24IP0eJDLZNOOvMYdR1iCIeXoOUNGAXXRifXyoJ dltw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p12si27953980pgs.155.2017.06.04.01.04.26; Sun, 04 Jun 2017 01:04:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751311AbdFDID4 (ORCPT + 25 others); Sun, 4 Jun 2017 04:03:56 -0400 Received: from foss.arm.com ([217.140.101.70]:52692 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751180AbdFDIDP (ORCPT ); Sun, 4 Jun 2017 04:03:15 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B0DED15B2; Sun, 4 Jun 2017 01:03:14 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B22593F589; Sun, 4 Jun 2017 01:03:12 -0700 (PDT) From: Gilad Ben-Yossef To: Greg Kroah-Hartman Cc: Joe Perches , Ofir Drang , linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, driverdev-devel@linuxdriverproject.org, devel@driverdev.osuosl.org Subject: [PATCH v3 04/18] staging: ccree: refactor LLI access macros Date: Sun, 4 Jun 2017 11:02:25 +0300 Message-Id: <1496563362-7954-5-git-send-email-gilad@benyossef.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1496563362-7954-1-git-send-email-gilad@benyossef.com> References: <1496563362-7954-1-git-send-email-gilad@benyossef.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Linked List Item descriptors were being programmed via a set of macros which suffer a few problems: - Use of macros rather than inline leaves out parameter type checking and risks multiple macro parameter evaluation side effects. - Implemented via hand rolled versions of bitfield operations. This patch refactors LLI programming into a set of of inline functions using generic kernel bitfield access infrastructure, thus resolving the above issues and opening the way later on to drop the hand rolled bitfield macros once additional users are dropped in later patches in the series. Signed-off-by: Gilad Ben-Yossef --- drivers/staging/ccree/cc_lli_defs.h | 39 ++++++++++++++++++---------------- drivers/staging/ccree/ssi_buffer_mgr.c | 8 +++---- 2 files changed, 25 insertions(+), 22 deletions(-) -- 2.1.4 diff --git a/drivers/staging/ccree/cc_lli_defs.h b/drivers/staging/ccree/cc_lli_defs.h index 857b94f..876dde0 100644 --- a/drivers/staging/ccree/cc_lli_defs.h +++ b/drivers/staging/ccree/cc_lli_defs.h @@ -26,24 +26,7 @@ */ #define DLLI_SIZE_BIT_SIZE 0x18 -#define CC_MAX_MLLI_ENTRY_SIZE 0x10000 - -#define LLI_SET_ADDR(__lli_p, __addr) do { \ - u32 *lli_p = (u32 *)__lli_p; \ - typeof(__addr) addr = __addr; \ - \ - BITFIELD_SET(lli_p[LLI_WORD0_OFFSET], \ - LLI_LADDR_BIT_OFFSET, \ - LLI_LADDR_BIT_SIZE, (addr & U32_MAX)); \ - \ - BITFIELD_SET(lli_p[LLI_WORD1_OFFSET], \ - LLI_HADDR_BIT_OFFSET, \ - LLI_HADDR_BIT_SIZE, MSB64(addr)); \ - } while (0) - -#define LLI_SET_SIZE(lli_p, size) \ - BITFIELD_SET(((u32 *)(lli_p))[LLI_WORD1_OFFSET], \ - LLI_SIZE_BIT_OFFSET, LLI_SIZE_BIT_SIZE, size) +#define CC_MAX_MLLI_ENTRY_SIZE 0xFFFF /* Size of entry */ #define LLI_ENTRY_WORD_SIZE 2 @@ -60,4 +43,24 @@ #define LLI_HADDR_BIT_OFFSET 16 #define LLI_HADDR_BIT_SIZE 16 +#define LLI_SIZE_MASK GENMASK((LLI_SIZE_BIT_SIZE - 1), LLI_SIZE_BIT_OFFSET) +#define LLI_HADDR_MASK GENMASK( \ + (LLI_HADDR_BIT_OFFSET + LLI_HADDR_BIT_SIZE - 1),\ + LLI_HADDR_BIT_OFFSET) + +static inline void cc_lli_set_addr(u32 *lli_p, dma_addr_t addr) +{ + lli_p[LLI_WORD0_OFFSET] = (addr & U32_MAX); +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT + lli_p[LLI_WORD1_OFFSET] &= ~LLI_HADDR_MASK; + lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_HADDR_MASK, (addr >> 16)); +#endif /* CONFIG_ARCH_DMA_ADDR_T_64BIT */ +} + +static inline void cc_lli_set_size(u32 *lli_p, u16 size) +{ + lli_p[LLI_WORD1_OFFSET] &= ~LLI_SIZE_MASK; + lli_p[LLI_WORD1_OFFSET] |= FIELD_PREP(LLI_SIZE_MASK, size); +} + #endif /*_CC_LLI_DEFS_H_*/ diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c b/drivers/staging/ccree/ssi_buffer_mgr.c index f21dd26..24ba51d 100644 --- a/drivers/staging/ccree/ssi_buffer_mgr.c +++ b/drivers/staging/ccree/ssi_buffer_mgr.c @@ -186,8 +186,8 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli( /*handle buffer longer than 64 kbytes */ while (buff_size > CC_MAX_MLLI_ENTRY_SIZE ) { - LLI_SET_ADDR(mlli_entry_p,buff_dma); - LLI_SET_SIZE(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE); + cc_lli_set_addr(mlli_entry_p, buff_dma); + cc_lli_set_size(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE); SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents, mlli_entry_p[LLI_WORD0_OFFSET], mlli_entry_p[LLI_WORD1_OFFSET]); @@ -197,8 +197,8 @@ static inline int ssi_buffer_mgr_render_buff_to_mlli( (*curr_nents)++; } /*Last entry */ - LLI_SET_ADDR(mlli_entry_p,buff_dma); - LLI_SET_SIZE(mlli_entry_p, buff_size); + cc_lli_set_addr(mlli_entry_p, buff_dma); + cc_lli_set_size(mlli_entry_p, buff_size); SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents, mlli_entry_p[LLI_WORD0_OFFSET], mlli_entry_p[LLI_WORD1_OFFSET]);