From patchwork Thu May 25 12:04:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 100504 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp720023qge; Thu, 25 May 2017 04:41:44 -0700 (PDT) X-Received: by 10.99.163.67 with SMTP id v3mr46654359pgn.210.1495712504363; Thu, 25 May 2017 04:41:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495712504; cv=none; d=google.com; s=arc-20160816; b=F/k5HPWKAz0TkL32ETFBmY0goSxrgxeRNvK04LcsnZ7k3nDUaktZiVP2axeAOLoUau c+u2hSkaUtg9IziszV3pbFwuZNhZMCY651mnpkjBejId1RhSVzNX3guBlKAR8hby1M7c GabWTvEo2SU2tNFwIZtnwTs3for8b9zt1bPfTPrQNk+G/7XvGbknk1aGlQ5oJEHxWR44 9cv2I/XvGSExsCFfkGXR/r/MluSLQ+hWUJ4EMMTgdg+O2Kha7+QwbTYRyLD0ivV1sSLT 6qBDQ0LnzgxJalPFv2sAJFNEOb7UWn5PFiOFMx2wp1scUtidg6o8Re7MUtNrMRTd/wv7 ko0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=NBkuFmQMaN5YGvA7azc839YyXP8p5u0BOr61aqCkgP0=; b=nez2N40GroX5bzG1movkqNGPT0egOxRtHmr8pRR6bLF2p42lJ1iLThKR1IYxHgFBCm 5C1iB73JuExhcl2ayu4pPI82SJskRaGy5WR8gV9kuDit+sD/JSuVoFeb924lCNhpTkGJ JzGcvO/dwaLbEvBFlFuZZxd+clN5VHTKl3ViooXfSSF4igvEY2WYiGm9jBjFoIsXz1Q8 4j0e4SLs4KiOXeUaQ3DKeghr4q1x5tA1AN/r75e5Gp6jGygCEA1AOjW+D32eFHFhSQJp XxNSzCj9SaqicoqpVmZ/72aOU+lhyLvGj3GIBEZ6QS9t8Hpl3evKpIJQhNfiWom076jp chdA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s131si22633369pgs.324.2017.05.25.04.41.44; Thu, 25 May 2017 04:41:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965733AbdEYLlk (ORCPT + 25 others); Thu, 25 May 2017 07:41:40 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:7265 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1763815AbdEYLed (ORCPT ); Thu, 25 May 2017 07:34:33 -0400 Received: from 172.30.72.55 (EHLO DGGEML403-HUB.china.huawei.com) ([172.30.72.55]) by dggrg01-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id APE94334; Thu, 25 May 2017 19:34:31 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEML403-HUB.china.huawei.com (10.3.17.33) with Microsoft SMTP Server id 14.3.301.0; Thu, 25 May 2017 19:34:19 +0800 From: John Garry To: , CC: , , , , , John Garry , Xiang Chen Subject: [PATCH v2 08/22] scsi: hisi_sas: add skeleton v3 hw driver Date: Thu, 25 May 2017 20:04:57 +0800 Message-ID: <1495713911-80476-9-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495713911-80476-1-git-send-email-john.garry@huawei.com> References: <1495713911-80476-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.5926C148.000D, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 4ccfb442903aa2a299e5722f7e671c10 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add skeleton driver for v3 hw in hisi_sas_v3_hw.c File hisi_sas_v3_hw.c will serve 2 purposes: - probing and initialisation of the controller based on pci device - hw layer for v3-based controllers The controller design is quite similar to v2 hw in hip07. However key differences include: -All v2 hw bugs are fixed (hopefully), so workarounds are not required -support for device deregistration -some interrupt modifications -configurable max device support Signed-off-by: John Garry Signed-off-by: Xiang Chen --- drivers/scsi/hisi_sas/Kconfig | 10 +++++++- drivers/scsi/hisi_sas/Makefile | 1 + drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 47 ++++++++++++++++++++++++++++++++++ 3 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 drivers/scsi/hisi_sas/hisi_sas_v3_hw.c -- 1.9.1 diff --git a/drivers/scsi/hisi_sas/Kconfig b/drivers/scsi/hisi_sas/Kconfig index 374a329..d42f29a 100644 --- a/drivers/scsi/hisi_sas/Kconfig +++ b/drivers/scsi/hisi_sas/Kconfig @@ -6,4 +6,12 @@ config SCSI_HISI_SAS select BLK_DEV_INTEGRITY depends on ATA help - This driver supports HiSilicon's SAS HBA + This driver supports HiSilicon's SAS HBA, including support based + on platform device + +config SCSI_HISI_SAS_PCI + tristate "HiSilicon SAS on PCI bus" + depends on SCSI_HISI_SAS + depends on PCI + help + This driver supports HiSilicon's SAS HBA based on PCI device diff --git a/drivers/scsi/hisi_sas/Makefile b/drivers/scsi/hisi_sas/Makefile index c6d3a1b..24623f2 100644 --- a/drivers/scsi/hisi_sas/Makefile +++ b/drivers/scsi/hisi_sas/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_SCSI_HISI_SAS) += hisi_sas_main.o obj-$(CONFIG_SCSI_HISI_SAS) += hisi_sas_v1_hw.o hisi_sas_v2_hw.o +obj-$(CONFIG_SCSI_HISI_SAS_PCI) += hisi_sas_v3_hw.o diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c new file mode 100644 index 0000000..cf72577 --- /dev/null +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2017 Hisilicon Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include "hisi_sas.h" +#define DRV_NAME "hisi_sas_v3_hw" + +static int +hisi_sas_v3_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + return 0; +} + +static void hisi_sas_v3_remove(struct pci_dev *pdev) +{ +} + +enum { + /* instances of the controller */ + hip08, +}; + +static const struct pci_device_id sas_v3_pci_table[] = { + { PCI_VDEVICE(HUAWEI, 0xa230), hip08 }, + {} +}; + +static struct pci_driver sas_v3_pci_driver = { + .name = DRV_NAME, + .id_table = sas_v3_pci_table, + .probe = hisi_sas_v3_probe, + .remove = hisi_sas_v3_remove, +}; + +module_pci_driver(sas_v3_pci_driver); + +MODULE_VERSION(DRV_VERSION); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("John Garry "); +MODULE_DESCRIPTION("HISILICON SAS controller v3 hw driver based on pci device"); +MODULE_ALIAS("platform:" DRV_NAME);