From patchwork Mon May 22 12:48:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shaokun Zhang X-Patchwork-Id: 100291 Delivered-To: patch@linaro.org Received: by 10.182.142.97 with SMTP id rv1csp1367331obb; Mon, 22 May 2017 05:18:14 -0700 (PDT) X-Received: by 10.99.109.199 with SMTP id i190mr24843890pgc.71.1495455494258; Mon, 22 May 2017 05:18:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495455494; cv=none; d=google.com; s=arc-20160816; b=ReFlZVvZ2oZUPLmwO/gmkekZqQDZvxlfzkkIJ8Pqy+cIKSG2CvHiEsJTtKfvlPuT6j v8wHd6+87jSgyvJBok32wvWtiA6bLvLykFgVQcUpgzu3boIu93sTU6brZVC563CfHenm 7vS3kTfTLWtRQFzJdTNlta8oSMMtSFkMAj1EuLqlq4uO7DUveJgfzbquF7gnyN6UmLwb YyY33dUcRVBkj7+uRAi8AX/GTHhYfIbFTVTn5XxC4WZoOQJgRUkP9RQbY3hG4jJNwmoA sPmlEgUOYwgsKMwcaKp5jGscDhwt+H7JXHMpIZj3PqNmr8V55nBdNvPeM+A2rmWWnbin kN3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=b5CGRq2/XcHMm7dzvSkXrFhHPHt6NlfbUpxfovdQ+/4=; b=MNsLXh95KpUqituip8HyGG58pTnlcH8VEakPAwcWNOPhSkseDW5AFA8dEEhcX/Wx1c 3lv4+GleN2rt/lva47DppbVoF7IOPZUzHsItSXz57KumKYf1yiySBv0FwkbgDKeDY3rI Mel9pWOR9PonexT85yq0WEVquXd3RZ/YeiWxO/EhUe3qcZNWnHFvHvA7mzNs3bXm1rkY hjo9SEOFamjNHuInorbFOJEDCgRah3wLNNfB0KS0y8ynhSY2WkvkeK5vfJBgVZ/3MmEF wvh9/6pFJ9OKt0adecCrC1Bj8VToGaooZsOUj/3XtuMiVga4+OlSNTVsv2TMpiNq8OpP R+6Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g65si17113056pfj.270.2017.05.22.05.18.13; Mon, 22 May 2017 05:18:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759566AbdEVMSE (ORCPT + 25 others); Mon, 22 May 2017 08:18:04 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:6430 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759419AbdEVMR6 (ORCPT ); Mon, 22 May 2017 08:17:58 -0400 Received: from 172.30.72.53 (EHLO dggeml405-hub.china.huawei.com) ([172.30.72.53]) by dggrg03-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AOC29435; Mon, 22 May 2017 20:17:10 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by dggeml405-hub.china.huawei.com (10.3.17.49) with Microsoft SMTP Server id 14.3.301.0; Mon, 22 May 2017 20:17:01 +0800 From: Shaokun Zhang To: , , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH v8 1/9] arm64: MAINTAINERS: hisi: Add hisilicon SoC PMU support Date: Mon, 22 May 2017 20:48:00 +0800 Message-ID: <1495457280-233300-1-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.5922D6CB.00CA, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 3b5fa399c7aa756cb6ac3b66d7682ba2 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Anurup M Add support for Hisilicon SoC hardware event counters for HiP05/06/07 chip versions. Signed-off-by: Anurup M Signed-off-by: Shaokun Zhang --- MAINTAINERS | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 1.9.1 diff --git a/MAINTAINERS b/MAINTAINERS index c0348bc..ac5a64e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6072,6 +6072,16 @@ S: Maintained F: drivers/net/ethernet/hisilicon/ F: Documentation/devicetree/bindings/net/hisilicon*.txt +HISILICON SOC PMU +M: Anurup M +M: Shaokun Zhang +W: http://www.hisilicon.com +S: Supported +F: drivers/perf/hisilicon/ +F: Documentation/perf/hisi-pmu.txt +F: Documentation/devicetree/bindings/arm/hisilicon/pmu.txt +F: Documentation/devicetree/bindings/arm/hisilicon/djtag.txt + HISILICON ROCE DRIVER M: Lijun Ou M: Wei Hu(Xavier)