From patchwork Wed May 17 10:49:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 99961 Delivered-To: patch@linaro.org Received: by 10.182.142.97 with SMTP id rv1csp140936obb; Wed, 17 May 2017 03:23:29 -0700 (PDT) X-Received: by 10.84.217.218 with SMTP id d26mr3471616plj.47.1495016609497; Wed, 17 May 2017 03:23:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495016609; cv=none; d=google.com; s=arc-20160816; b=YtzTIhBTYUNactxyOzLg/laviQtSS77jjegYWZOWeflaR0PZXaf8bvauXaQWDavQkD ALq2O7SybLtEx2hPD1z9+ZTrm3cz9Leo66W15EKdDpm+AjBOPPbP6mK5xsO7Sz+KXWhM HJGlUTYnn5rOL3Glg79QHLV28LtmjiYn2xu3Rpi+TIW0fuysfL7EWwNPilOFGmsUNjo6 a+zL8sMCJe4zrO4ChcSpldkW5b+3a7JR0aGpLnnqRKkyKmUgBZFy2LAK6BGjm7Wr+u6N Zz7wANygr/T5q8yAXk+SUGnImBAH/qDH3pNuVQD5OrpPSl3GWASQQECenAMlCw1yRiYm 1tew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=BI5R+IT+SLzfaootiiGQAdXKENRVFlhh+7+Gn42zmDc=; b=ZVk0mnrZnC5wCjG6irrH+sFu+3pEgNx9kiIkvmZwczn92VA2gEVNmYPQ89998GpnLU 5JZYBbdfPmIBlWrO61yXTpGBlJBt6SJzLnQDEesBUKpi5lUHgJhix/KvQfzMlo/kKlDs mpDyS65hnLUwuR8auGOao+jhjyZLzWAt7ZemBb2jjfX75LR59niWrMbvPNUCcJjqF5Ez dN49oA6C1St2wqAG7+Py3F5DHKXjISC8OelGLNhitoC2vGy1fWOGlkOZU9c6o8yu9bGa UIQSInFRg1y3OEYyBZ6HhIjf+G+0EUS+7aaGS3E38M7L6JfLHBMYie1ltqpWD5lwyoNN AcFA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k62si1674533pge.400.2017.05.17.03.23.29; Wed, 17 May 2017 03:23:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754693AbdEQKXB (ORCPT + 25 others); Wed, 17 May 2017 06:23:01 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:6321 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754418AbdEQKTs (ORCPT ); Wed, 17 May 2017 06:19:48 -0400 Received: from 172.30.72.55 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.55]) by dggrg01-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id AOT12438; Wed, 17 May 2017 18:19:45 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Wed, 17 May 2017 18:19:35 +0800 From: John Garry To: , CC: , , , , , Xiang Chen , John Garry Subject: [PATCH 15/22] scsi: hisi_sas: add v3 code to send SMP frame Date: Wed, 17 May 2017 18:49:50 +0800 Message-ID: <1495018197-120535-16-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1495018197-120535-1-git-send-email-john.garry@huawei.com> References: <1495018197-120535-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.591C23C1.0139, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: f47fbd433ea861662366e910d0b8cf44 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xiang Chen Add code to prepare SMP frame. Signed-off-by: John Garry Signed-off-by: Xiang Chen --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 74 ++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) -- 1.9.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 77616ff..396bb4c 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -186,6 +186,9 @@ #define CMD_HDR_MRFL_MSK (0x1ff << CMD_HDR_MRFL_OFF) #define CMD_HDR_SG_MOD_OFF 24 #define CMD_HDR_SG_MOD_MSK (0x3 << CMD_HDR_SG_MOD_OFF) +/* dw3 */ +#define CMD_HDR_IPTT_OFF 0 +#define CMD_HDR_IPTT_MSK (0xffff << CMD_HDR_IPTT_OFF) /* dw6 */ #define CMD_HDR_DIF_SGL_LEN_OFF 0 #define CMD_HDR_DIF_SGL_LEN_MSK (0xffff << CMD_HDR_DIF_SGL_LEN_OFF) @@ -636,6 +639,76 @@ static int prep_ssp_v3_hw(struct hisi_hba *hisi_hba, return 0; } +static int prep_smp_v3_hw(struct hisi_hba *hisi_hba, + struct hisi_sas_slot *slot) +{ + struct sas_task *task = slot->task; + struct hisi_sas_cmd_hdr *hdr = slot->cmd_hdr; + struct domain_device *device = task->dev; + struct device *dev = hisi_hba->dev; + struct hisi_sas_port *port = slot->port; + struct scatterlist *sg_req, *sg_resp; + struct hisi_sas_device *sas_dev = device->lldd_dev; + dma_addr_t req_dma_addr; + unsigned int req_len, resp_len; + int elem, rc; + + /* + * DMA-map SMP request, response buffers + */ + /* req */ + sg_req = &task->smp_task.smp_req; + elem = dma_map_sg(dev, sg_req, 1, DMA_TO_DEVICE); + if (!elem) + return -ENOMEM; + req_len = sg_dma_len(sg_req); + req_dma_addr = sg_dma_address(sg_req); + + /* resp */ + sg_resp = &task->smp_task.smp_resp; + elem = dma_map_sg(dev, sg_resp, 1, DMA_FROM_DEVICE); + if (!elem) { + rc = -ENOMEM; + goto err_out_req; + } + resp_len = sg_dma_len(sg_resp); + if ((req_len & 0x3) || (resp_len & 0x3)) { + rc = -EINVAL; + goto err_out_resp; + } + + /* create header */ + /* dw0 */ + hdr->dw0 = cpu_to_le32((port->id << CMD_HDR_PORT_OFF) | + (1 << CMD_HDR_PRIORITY_OFF) | /* high pri */ + (2 << CMD_HDR_CMD_OFF)); /* smp */ + + /* map itct entry */ + hdr->dw1 = cpu_to_le32((sas_dev->device_id << CMD_HDR_DEV_ID_OFF) | + (1 << CMD_HDR_FRAME_TYPE_OFF) | + (DIR_NO_DATA << CMD_HDR_DIR_OFF)); + + /* dw2 */ + hdr->dw2 = cpu_to_le32((((req_len - 4) / 4) << CMD_HDR_CFL_OFF) | + (HISI_SAS_MAX_SMP_RESP_SZ / 4 << + CMD_HDR_MRFL_OFF)); + + hdr->transfer_tags = cpu_to_le32(slot->idx << CMD_HDR_IPTT_OFF); + + hdr->cmd_table_addr = cpu_to_le64(req_dma_addr); + hdr->sts_buffer_addr = cpu_to_le64(slot->status_buffer_dma); + + return 0; + +err_out_resp: + dma_unmap_sg(dev, &slot->task->smp_task.smp_resp, 1, + DMA_FROM_DEVICE); +err_out_req: + dma_unmap_sg(dev, &slot->task->smp_task.smp_req, 1, + DMA_TO_DEVICE); + return rc; +} + static int phy_up_v3_hw(int phy_no, struct hisi_hba *hisi_hba) { int i, res = 0; @@ -1231,6 +1304,7 @@ static int hisi_sas_v3_init(struct hisi_hba *hisi_hba) .sl_notify = sl_notify_v3_hw, .complete_hdr_size = sizeof(struct hisi_sas_complete_v3_hdr), .prep_ssp = prep_ssp_v3_hw, + .prep_smp = prep_smp_v3_hw, .get_free_slot = get_free_slot_v3_hw, .start_delivery = start_delivery_v3_hw, .slot_complete = slot_complete_v3_hw,