From patchwork Wed Apr 19 16:44:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 97651 Delivered-To: patch@linaro.org Received: by 10.182.246.10 with SMTP id xs10csp355039obc; Wed, 19 Apr 2017 09:45:43 -0700 (PDT) X-Received: by 10.98.19.137 with SMTP id 9mr3972842pft.208.1492620343346; Wed, 19 Apr 2017 09:45:43 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z62si3255932pgd.263.2017.04.19.09.45.43; Wed, 19 Apr 2017 09:45:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966671AbdDSQpb (ORCPT + 16 others); Wed, 19 Apr 2017 12:45:31 -0400 Received: from foss.arm.com ([217.140.101.70]:43682 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966616AbdDSQp0 (ORCPT ); Wed, 19 Apr 2017 12:45:26 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F13301AC1; Wed, 19 Apr 2017 09:45:25 -0700 (PDT) Received: from leverpostej.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8844C3F4FF; Wed, 19 Apr 2017 09:45:24 -0700 (PDT) From: Mark Rutland To: daniel.lezcano@linaro.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, tglx@linutronix.de, fu.wei@linaro.org, lorenzo.pieralisi@arm.com, hanjun.guo@linaro.org, marc.zyngier@arm.com Subject: [PATCH 10/16] clocksource: arm_arch_timer: add structs to describe MMIO timer Date: Wed, 19 Apr 2017 17:44:27 +0100 Message-Id: <1492620273-30037-11-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1492620273-30037-1-git-send-email-mark.rutland@arm.com> References: <1492620273-30037-1-git-send-email-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fu Wei In preparation for ACPI GTDT support, this patch adds structs to describe the MMIO timers indepedent of the firmware interface. Subsequent patches will use these to split the FW/HW probing logic, so that the HW probing logic can be shared by ACPI and DT. Signed-off-by: Fu Wei Reviewed-by: Hanjun Guo Signed-off-by: Mark Rutland --- include/clocksource/arm_arch_timer.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 1.9.1 diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 4a98c06..cc805b7 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -57,6 +57,8 @@ enum arch_timer_spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3 +#define ARCH_TIMER_MEM_MAX_FRAMES 8 + #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) @@ -72,6 +74,20 @@ struct arch_timer_kvm_info { int virtual_irq; }; +struct arch_timer_mem_frame { + bool valid; + phys_addr_t cntbase; + size_t size; + int phys_irq; + int virt_irq; +}; + +struct arch_timer_mem { + phys_addr_t cntctlbase; + size_t size; + struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES]; +}; + #ifdef CONFIG_ARM_ARCH_TIMER extern u32 arch_timer_get_rate(void);