From patchwork Thu Mar 30 06:46:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 96250 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp103957qgd; Wed, 29 Mar 2017 23:55:31 -0700 (PDT) X-Received: by 10.98.48.196 with SMTP id w187mr4323540pfw.179.1490856931605; Wed, 29 Mar 2017 23:55:31 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s5si1253528pgo.231.2017.03.29.23.55.31; Wed, 29 Mar 2017 23:55:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933355AbdC3Gza (ORCPT + 22 others); Thu, 30 Mar 2017 02:55:30 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:39998 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932755AbdC3GtH (ORCPT ); Thu, 30 Mar 2017 02:49:07 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-07.nifty.com with ESMTP id v2U6kUce015463; Thu, 30 Mar 2017 15:46:52 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com v2U6kUce015463 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1490856413; bh=Kj+y1uySyRo+8B6I7Y642NVgoXKgjiH8NH0SH0vpqRE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AGfd8HQXc+Pc/gTAyB9mx7V3HRYhoqCWpxdzC7DFsRcigqenKTGPolH0feme3Al2t ZsptcpUzC6YSBxIn+VES+FULW/s6St3Pi26oy41AWVUsydaxNLInSMRLFh2ZCh8Fjq 8mYoBdK6V6yhYH+2Mfm3CEoRwhW4CurOcTRfPE4mBZAogv4LN/y1feQzMfYqKiGTdx AeFMz3+1ETj9tY3nDYCXy6sbaVu/JGi4f7uMZXhvF7J1pPD3xuSg8dY6l+sOqK/tpc X37w09jPsL2Heilj/JgZWejkCQlssml9A8hY8L18Q6QlnlW53RDNVSO+uIF59bFyXs IVPl2yQnIgstA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Enrico Jorns , Artem Bityutskiy , Dinh Nguyen , Boris Brezillon , Marek Vasut , Graham Moore , David Woodhouse , Masami Hiramatsu , Chuanxiao Dong , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Brian Norris , Richard Weinberger , Cyrille Pitchen , Rob Herring , Mark Rutland Subject: [PATCH v3 16/37] mtd: nand: denali_dt: add compatible strings for UniPhier SoC variants Date: Thu, 30 Mar 2017 15:46:02 +0900 Message-Id: <1490856383-31560-17-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490856383-31560-1-git-send-email-yamada.masahiro@socionext.com> References: <1490856383-31560-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add two compatible strings for UniPhier SoCs. "socionext,uniphier-denali-nand-v5a" is used on UniPhier sLD3, LD4, Pro4, sLD8 SoCs. "socionext,uniphier-denali-nand-v5b" is used on UniPhier Pro5, PXs2, LD6b, LD11, LD20 SoCs. Signed-off-by: Masahiro Yamada --- Changes in v3: None Changes in v2: - Change the compatible strings - Fix the ecc_strength_capability - Override revision number for the newer one .../devicetree/bindings/mtd/denali-nand.txt | 6 ++++++ drivers/mtd/nand/denali_dt.c | 23 ++++++++++++++++++++++ 2 files changed, 29 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 647618e..0b08ea5 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -3,6 +3,8 @@ Required properties: - compatible : should be one of the following: "altr,socfpga-denali-nand" - for Altera SOCFPGA + "socionext,uniphier-denali-nand-v5a" - for Socionext UniPhier (v5a) + "socionext,uniphier-denali-nand-v5b" - for Socionext UniPhier (v5b) - reg : should contain registers location and length for data and reg. - reg-names: Should contain the reg names "nand_data" and "denali_reg" - interrupts : The interrupt number. @@ -10,9 +12,13 @@ Required properties: Optional properties: - nand-ecc-step-size: must be 512 or 1024. If not specified, default to: 512 for "altr,socfpga-denali-nand" + 1024 for "socionext,uniphier-denali-nand-v5a" + 1024 for "socionext,uniphier-denali-nand-v5b" see nand.txt for details. - nand-ecc-strength: see nand.txt for details. Available values are: 8, 15 for "altr,socfpga-denali-nand" + 8, 16, 24 for "socionext,uniphier-denali-nand-v5a" + 8, 16 for "socionext,uniphier-denali-nand-v5b" - nand-ecc-maximize: see nand.txt for details Note: diff --git a/drivers/mtd/nand/denali_dt.c b/drivers/mtd/nand/denali_dt.c index c3bc333..1f2f68a 100644 --- a/drivers/mtd/nand/denali_dt.c +++ b/drivers/mtd/nand/denali_dt.c @@ -41,11 +41,34 @@ static const struct denali_dt_data denali_socfpga_data = { DENALI_CAP_ECC_SIZE_512, }; +static const struct denali_dt_data denali_uniphier_v5a_data = { + .ecc_strength_avail = BIT(24) | BIT(16) | BIT(8), + .caps = DENALI_CAP_HW_ECC_FIXUP | + DENALI_CAP_DMA_64BIT | + DENALI_CAP_ECC_SIZE_1024, +}; + +static const struct denali_dt_data denali_uniphier_v5b_data = { + .revision = 0x0501, + .ecc_strength_avail = BIT(16) | BIT(8), + .caps = DENALI_CAP_HW_ECC_FIXUP | + DENALI_CAP_DMA_64BIT | + DENALI_CAP_ECC_SIZE_1024, +}; + static const struct of_device_id denali_nand_dt_ids[] = { { .compatible = "altr,socfpga-denali-nand", .data = &denali_socfpga_data, }, + { + .compatible = "socionext,uniphier-denali-nand-v5a", + .data = &denali_uniphier_v5a_data, + }, + { + .compatible = "socionext,uniphier-denali-nand-v5b", + .data = &denali_uniphier_v5b_data, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, denali_nand_dt_ids);