From patchwork Fri Nov 4 16:43:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Bailon X-Patchwork-Id: 80894 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp71781qge; Fri, 4 Nov 2016 09:44:37 -0700 (PDT) X-Received: by 10.98.208.131 with SMTP id p125mr1484011pfg.168.1478277877185; Fri, 04 Nov 2016 09:44:37 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id sz2si3902543pab.55.2016.11.04.09.44.36; Fri, 04 Nov 2016 09:44:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965062AbcKDQoS (ORCPT + 27 others); Fri, 4 Nov 2016 12:44:18 -0400 Received: from mail-wm0-f46.google.com ([74.125.82.46]:36385 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936435AbcKDQnp (ORCPT ); Fri, 4 Nov 2016 12:43:45 -0400 Received: by mail-wm0-f46.google.com with SMTP id p190so62706162wmp.1 for ; Fri, 04 Nov 2016 09:43:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D4ztYMCGeVI61l6AxFRDemWQd/XRzB/VXJYPGGZ36g4=; b=ij+eYvT4tAXsM7a/e+6+l1jBXKnspBxbsswsZ1VH48hZShJ7t/bMYOhEP7AJP9vdZu YXheR9FZpthK628M9SavI34OPKG9gQVRtDqyF5XISHOSNScBU7WN5RMM3z3fqIEVe21w EnNECCOmEZ20jY4A0R86txgfSZnMXB1yequroMDIcO6yjH+kllnJeItvgrEJGZw1Qf5t miWkmNF0axRwLXs6RlkqzZvdLb17rJ56cUK9RCdQS8ju0/Oj9KbHsfPfMJUB5Wqwi1U9 eCKPMPCQ8j5TIlrUBGSaIIjmcX60sQVFWMJjX7HKK2RDuFIccW6bMIi1dvTRHZFnOWxQ UD2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D4ztYMCGeVI61l6AxFRDemWQd/XRzB/VXJYPGGZ36g4=; b=mzRAlOEs7ZQK/1vaBSfNVW3MD+Tx2vw+UW3d1KvGbjVO72edrUz0180Yl6TRza4oVI lwn9bfY41JYy9737pkvA96cnR6zmfH2MQgMS2QQdBOauopvj4L0TCPyrbAb2CdlGyOj/ JkbnV7NG9DnRf4lr01D4rld7pbr+WingcJ61WqmpM3STMqY/sVqBZhKPmvV7alRX+jJw YDoFMhdUCBGepJUYuAkZ6SprlklBau9WK0gKAquhzSKxbp+29bLMeHbD1hygLigyiWGI P9KoXz/m/FFYIkvsLB2deLWl9BRdHvX38kD/0efeaSHJu4d/lQkAvRXGm+Z6hywXxJZk 6l5w== X-Gm-Message-State: ABUngve/2SIU/SGB7MOlD4BPylG9+Ae2d7OI2dFvc/v8EQZpM8we/Xyisa19xNiLl6r1SKtG X-Received: by 10.28.39.193 with SMTP id n184mr4483559wmn.72.1478277824127; Fri, 04 Nov 2016 09:43:44 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id af4sm15148128wjc.17.2016.11.04.09.43.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 04 Nov 2016 09:43:43 -0700 (PDT) From: Alexandre Bailon To: david@lechnology.com, b-liu@ti.com, balbi@kernel.org Cc: kishon@ti.com, khilman@baylibre.com, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, nsekhar@ti.com, Alexandre Bailon Subject: [PATCH v4 2/4] phy: da8xx-usb: Configure CFGCHIP2 to support OTG workaround Date: Fri, 4 Nov 2016 17:43:36 +0100 Message-Id: <1478277818-5091-3-git-send-email-abailon@baylibre.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1478277818-5091-1-git-send-email-abailon@baylibre.com> References: <1478277818-5091-1-git-send-email-abailon@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If we configure the da8xx OTG phy in OTG mode, neither device or host mode will work. That is because the PHY is not able to detect and notify the driver that value of ID pin changed. To work despite this hardware limitation, the da8xx glue implement a workaround. But to work, the workaround require the VBUS sense and the session end comparator to enabled. Enable them if the phy is configured in OTG mode. Signed-off-by: Alexandre Bailon --- drivers/phy/phy-da8xx-usb.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.7.3 diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c index 32ae78c..089c13b 100644 --- a/drivers/phy/phy-da8xx-usb.c +++ b/drivers/phy/phy-da8xx-usb.c @@ -23,6 +23,8 @@ #include #include +#define PHY_INIT_BITS (CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN) + struct da8xx_usb_phy { struct phy_provider *phy_provider; struct phy *usb11_phy; @@ -207,6 +209,9 @@ static int da8xx_usb_phy_probe(struct platform_device *pdev) dev_warn(dev, "Failed to create usb20 phy lookup\n"); } + regmap_write_bits(d_phy->regmap, CFGCHIP(2), + PHY_INIT_BITS, PHY_INIT_BITS); + return 0; }