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[209.132.180.67]) by mx.google.com with ESMTP id ls8si5254062pab.313.2016.10.27.00.00.23; Thu, 27 Oct 2016 00:00:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935309AbcJ0HAT (ORCPT + 27 others); Thu, 27 Oct 2016 03:00:19 -0400 Received: from mail-pf0-f177.google.com ([209.85.192.177]:33899 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934966AbcJ0G7v (ORCPT ); Thu, 27 Oct 2016 02:59:51 -0400 Received: by mail-pf0-f177.google.com with SMTP id n85so11957585pfi.1 for ; Wed, 26 Oct 2016 23:59:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UU7gjnHsE+uyJdkdOYry7ndInHssCdI24XIOOkGPNKU=; b=D0FT63bXuUbDXDbzz0be0ffyMRIPAn8Dg6lHkpmB5INSsZpr6qhVJ6YlvmFO5kYMLc gEZgVBK1FwNNBUtglpgeERWTM3mgygQ2MVT0n21L81UXXThxv4Odi1E426DvfsDH6CbO Cz2m7g05gQdJPNq+OIsuPf8MI7DrJvyH0QxcE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UU7gjnHsE+uyJdkdOYry7ndInHssCdI24XIOOkGPNKU=; b=EGbyPe9L5dAd6w3J1XiEL0bOEHqrQBQA/A8LuqhTNlWQbWbQHUV3ePrH2pjicK99Vn AWIdxvWvbpckXxJkq37Ec6Na0Kcr4839OlGG5uoW8Jj0SWMgHPbQ8SJ+g7R+JF5Cf+tD gJfBIRQ/HRLaFx4qSakP4BFmBnjcM5lQk7WEWAv6a0GaSLpayEJJHSuaDs6byUQ23h8t 0m8K4R+31NBI9FgzBnmZNwzMVCgzJVw/Hxwuj3qpUlog+Ic87aElg10LdrRpfFTdtixf 5m+hKANlCvEqsdovrO7zf3hEJ2NaT0NwQiCaUrxcDsJ6rhJE3DatUGX5cLLMAvGzfsm+ MVVw== X-Gm-Message-State: ABUngvczSO73ysy7qDLGCdvLtN8/NIRsRCzjMDiQoFGBdCyRtYvCuy0ogmGOmHgp4S1Hn9I+ X-Received: by 10.98.89.73 with SMTP id n70mr11526547pfb.82.1477551590899; Wed, 26 Oct 2016 23:59:50 -0700 (PDT) Received: from blr-ubuntu-59.ap.qualcomm.com ([202.46.23.61]) by smtp.gmail.com with ESMTPSA id w24sm8795544pfa.12.2016.10.26.23.59.48 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 26 Oct 2016 23:59:50 -0700 (PDT) From: Binoy Jayan To: Doug Ledford , Sean Hefty , Hal Rosenstock Cc: Arnd Bergmann , linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org, Binoy Jayan Subject: [PATCH v4 09/10] IB/mlx5: Replace semaphore umr_common:sem with wait_event Date: Thu, 27 Oct 2016 12:29:13 +0530 Message-Id: <1477551554-30349-10-git-send-email-binoy.jayan@linaro.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1477551554-30349-1-git-send-email-binoy.jayan@linaro.org> References: <1477551554-30349-1-git-send-email-binoy.jayan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove semaphore umr_common:sem used to limit concurrent access to umr qp and introduce an atomic value 'users' to keep track of the same. Use a wait_event to block when the limit is reached. Signed-off-by: Binoy Jayan --- drivers/infiniband/hw/mlx5/main.c | 6 +----- drivers/infiniband/hw/mlx5/mlx5_ib.h | 7 ++++++- drivers/infiniband/hw/mlx5/mr.c | 6 ++++-- 3 files changed, 11 insertions(+), 8 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c index 2217477..eb72bff 100644 --- a/drivers/infiniband/hw/mlx5/main.c +++ b/drivers/infiniband/hw/mlx5/main.c @@ -2437,10 +2437,6 @@ static void destroy_umrc_res(struct mlx5_ib_dev *dev) ib_dealloc_pd(dev->umrc.pd); } -enum { - MAX_UMR_WR = 128, -}; - static int create_umr_res(struct mlx5_ib_dev *dev) { struct ib_qp_init_attr *init_attr = NULL; @@ -2520,7 +2516,7 @@ static int create_umr_res(struct mlx5_ib_dev *dev) dev->umrc.cq = cq; dev->umrc.pd = pd; - sema_init(&dev->umrc.sem, MAX_UMR_WR); + init_waitqueue_head(&dev->umrc.wq); ret = mlx5_mr_cache_init(dev); if (ret) { mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h index dcdcd19..de31b5f 100644 --- a/drivers/infiniband/hw/mlx5/mlx5_ib.h +++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h @@ -533,7 +533,12 @@ struct umr_common { struct ib_qp *qp; /* control access to UMR QP */ - struct semaphore sem; + wait_queue_head_t wq; + atomic_t users; +}; + +enum { + MAX_UMR_WR = 128, }; enum { diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c index 1593856..dfaf6f6 100644 --- a/drivers/infiniband/hw/mlx5/mr.c +++ b/drivers/infiniband/hw/mlx5/mr.c @@ -867,7 +867,8 @@ static inline int mlx5_ib_post_send_wait(struct mlx5_ib_dev *dev, mlx5_ib_init_umr_context(&umr_context); umrwr->wr.wr_cqe = &umr_context.cqe; - down(&umrc->sem); + /* limit number of concurrent ib_post_send() on qp */ + wait_event(umrc->wq, atomic_add_unless(&umrc->users, 1, MAX_UMR_WR)); err = ib_post_send(umrc->qp, &umrwr->wr, &bad); if (err) { mlx5_ib_warn(dev, "UMR post send failed, err %d\n", err); @@ -879,7 +880,8 @@ static inline int mlx5_ib_post_send_wait(struct mlx5_ib_dev *dev, err = -EFAULT; } } - up(&umrc->sem); + atomic_dec(&umrc->users); + wake_up(&umrc->wq); return err; }