From patchwork Mon Sep 12 09:15:39 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 75973 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp751701qgf; Mon, 12 Sep 2016 02:16:09 -0700 (PDT) X-Received: by 10.66.249.164 with SMTP id yv4mr31651078pac.89.1473671769876; Mon, 12 Sep 2016 02:16:09 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id uj1si20821251pab.3.2016.09.12.02.16.09; Mon, 12 Sep 2016 02:16:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757275AbcILJQG (ORCPT + 27 others); Mon, 12 Sep 2016 05:16:06 -0400 Received: from mail-wm0-f48.google.com ([74.125.82.48]:37680 "EHLO mail-wm0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751449AbcILJQE (ORCPT ); Mon, 12 Sep 2016 05:16:04 -0400 Received: by mail-wm0-f48.google.com with SMTP id c131so46566629wmh.0 for ; Mon, 12 Sep 2016 02:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n9huJFJojuGUUNdueX/fxxsaTc888eiFPbBUm44oH1k=; b=Kqti6JbLpVLA6ZJWNyRCCGl5ADKGIAn775lJdDuUR5H+3ytytjE7iGyB2twB+ozKZ9 f2Rv8x14p2U0OB/XV6Ne9T3BNDZyhCLHFPCco/4pAJCM+oqtEipnCYAzICOS76BjSPRG UQMKLL5qBimp1Ouz4/5vL3XjVxQydoVeIv3OM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n9huJFJojuGUUNdueX/fxxsaTc888eiFPbBUm44oH1k=; b=eaoDtxoqck1+tiza2uIpKD/YDxHD53aYy8QstjXIKdb05FJ9pXfB7mnRD4YPf+7Qj8 xOUcvhT/CvF01/Zk+6DSGTL92QFdGjWM4dVJPSPjk6xkMLioO88HSFkVUH5W7tW3yUS3 SZRuLV9BHWnT50Df4zpx7kHoAXX9L9+DWwnDl9RdNK0LKF6tyBkmq1I/7YTui3dcjPnf uFHTMYqtLc1LsSQnrcJfz5+iKH/OX0rHJKxI00Klkaq1rRfRW3dNpcivmXCc+Ala/wEO VqRGqLvtjGzzBaDfpGhLIlE4NfOmL1psckGDiKksRpuGZxt/j/sIHGbHpK5M9Aw7HhIL iV4w== X-Gm-Message-State: AE9vXwMfJ+HJNRifXQWACbyptdW7S7QW/aoDz1xJpK4yDr0f0vmigy8e71rABnNFhWjc9+jj X-Received: by 10.194.87.169 with SMTP id az9mr14126388wjb.81.1473671762016; Mon, 12 Sep 2016 02:16:02 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:e089:f01a:f419:f17e]) by smtp.gmail.com with ESMTPSA id va3sm16939362wjb.18.2016.09.12.02.15.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 12 Sep 2016 02:16:01 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: mingo@kernel.org, linux-kernel@vger.kernel.org, Joel Stanley Subject: [PATCH 1/9] clocksource/drivers/moxart: Refactor enable/disable Date: Mon, 12 Sep 2016 11:15:39 +0200 Message-Id: <1473671747-9400-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Joel Stanley This patch abstracts the enable and disable register writes into their own functions in preparation for future changes to use SoC specific values for the writes. Signed-off-by: Joel Stanley Signed-off-by: Daniel Lezcano --- drivers/clocksource/moxart_timer.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c index 8414544..a3aaa56 100644 --- a/drivers/clocksource/moxart_timer.c +++ b/drivers/clocksource/moxart_timer.c @@ -58,15 +58,25 @@ static void __iomem *base; static unsigned int clock_count_per_tick; -static int moxart_shutdown(struct clock_event_device *evt) +static inline void moxart_disable(struct clock_event_device *evt) { writel(TIMER1_DISABLE, base + TIMER_CR); +} + +static inline void moxart_enable(struct clock_event_device *evt) +{ + writel(TIMER1_ENABLE, base + TIMER_CR); +} + +static int moxart_shutdown(struct clock_event_device *evt) +{ + moxart_disable(evt); return 0; } static int moxart_set_oneshot(struct clock_event_device *evt) { - writel(TIMER1_DISABLE, base + TIMER_CR); + moxart_disable(evt); writel(~0, base + TIMER1_BASE + REG_LOAD); return 0; } @@ -74,21 +84,21 @@ static int moxart_set_oneshot(struct clock_event_device *evt) static int moxart_set_periodic(struct clock_event_device *evt) { writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD); - writel(TIMER1_ENABLE, base + TIMER_CR); + moxart_enable(evt); return 0; } static int moxart_clkevt_next_event(unsigned long cycles, - struct clock_event_device *unused) + struct clock_event_device *evt) { u32 u; - writel(TIMER1_DISABLE, base + TIMER_CR); + moxart_disable(evt); u = readl(base + TIMER1_BASE + REG_COUNT) - cycles; writel(u, base + TIMER1_BASE + REG_MATCH1); - writel(TIMER1_ENABLE, base + TIMER_CR); + moxart_enable(evt); return 0; }