From patchwork Tue Aug 30 16:19:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 75004 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp2231159qga; Tue, 30 Aug 2016 09:20:06 -0700 (PDT) X-Received: by 10.66.53.234 with SMTP id e10mr7850413pap.28.1472574002022; Tue, 30 Aug 2016 09:20:02 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 67si45848928pfy.28.2016.08.30.09.20.01; Tue, 30 Aug 2016 09:20:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932395AbcH3QTr (ORCPT + 27 others); Tue, 30 Aug 2016 12:19:47 -0400 Received: from mail-it0-f50.google.com ([209.85.214.50]:36120 "EHLO mail-it0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932127AbcH3QTi (ORCPT ); Tue, 30 Aug 2016 12:19:38 -0400 Received: by mail-it0-f50.google.com with SMTP id e63so174011825ith.1 for ; Tue, 30 Aug 2016 09:19:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/Tf4/i3IXJ6Lda4fhaqLTNdtfvPt2hUQuYvsCFFiuq0=; b=ZO+1q3ulA2e7F5N7yOvREm+HsW6Vi4N9FE2GCe9CWu/xHrNtuLQrVXZfmBh96CqqpO hQ5jdspfdHGT9xgOEgXmWnsQSj3c2GyCF2/oNhEDIgL61UzFbzO0ud+6aZDaLGGGokY6 szgn02Eban8WHkpXi+7m2eyC9pITIlIzocfJQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/Tf4/i3IXJ6Lda4fhaqLTNdtfvPt2hUQuYvsCFFiuq0=; b=h7ZE7bi65QuOISUenJnb0fsFYMYXqQ1/0YUTr4scu7AoCu3espxRHj0LyAoGx9385Q 0Q+l5U5yvXTaUFDnVKQ4SRhf9tA/Qj2wRjSWLyQxY0GIXkfPmuRSeNwqRGREIhPzunBa vSInUHF2ZMiCrFqK8BFkPqEdi8BifOCQD5XmUhxfenFfZZNjcx7yytbbBaycd2DtCz1e +LHHBpUvBj4lodoA9EHbqrJESQFEsDKqgO67fvUaJxGsuAEbgt+2MNZse0LWVM9Gh4is xnagW9kSqi642pF4e9MBBvcHRpRn3F88jcLap+Us7MgAm0y0lu0tg3OMmzcssx2DYL/m LEtQ== X-Gm-Message-State: AE9vXwNlxJopscu5rhisp/+/yJtIsoyGw4w82x3BPIvOHFXAMAr8oLKJlm3vGzde59JPWaJm X-Received: by 10.36.211.197 with SMTP id n188mr6967314itg.65.1472573977587; Tue, 30 Aug 2016 09:19:37 -0700 (PDT) Received: from t430.cg.shawcable.net (S0106002369de4dac.cg.shawcable.net. [68.147.8.254]) by smtp.gmail.com with ESMTPSA id j63sm3459825itj.19.2016.08.30.09.19.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 30 Aug 2016 09:19:37 -0700 (PDT) From: Mathieu Poirier To: acme@kernel.org Cc: acme@infradead.org, peterz@infradead.org, jolsa@kernel.org, mingo@redhat.com, alexander.shishkin@linux.intel.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH V7 5/5] perf tools: adding sink configuration for cs_etm PMU Date: Tue, 30 Aug 2016 10:19:25 -0600 Message-Id: <1472573965-3881-6-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472573965-3881-1-git-send-email-mathieu.poirier@linaro.org> References: <1472573965-3881-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Using the PMU::set_drv_config() callback to enable the CoreSight sink that will be used for the trace session. Signed-off-by: Mathieu Poirier Acked-by: Jiri Olsa --- tools/perf/arch/arm/util/cs-etm.c | 56 +++++++++++++++++++++++++++++++++++++++ tools/perf/arch/arm/util/cs-etm.h | 3 +++ tools/perf/arch/arm/util/pmu.c | 3 +++ 3 files changed, 62 insertions(+) -- 2.7.4 diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c index 829c479614f1..dfea6b635525 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -27,12 +27,16 @@ #include "../../util/auxtrace.h" #include "../../util/cpumap.h" #include "../../util/evlist.h" +#include "../../util/evsel.h" #include "../../util/pmu.h" #include "../../util/thread_map.h" #include "../../util/cs-etm.h" #include +#define ENABLE_SINK_MAX 128 +#define CS_BUS_DEVICE_PATH "/bus/coresight/devices/" + struct cs_etm_recording { struct auxtrace_record itr; struct perf_pmu *cs_etm_pmu; @@ -557,3 +561,55 @@ struct auxtrace_record *cs_etm_record_init(int *err) out: return NULL; } + +static FILE *cs_device__open_file(const char *name) +{ + struct stat st; + char path[PATH_MAX]; + const char *sysfs; + + sysfs = sysfs__mountpoint(); + if (!sysfs) + return NULL; + + snprintf(path, PATH_MAX, + "%s" CS_BUS_DEVICE_PATH "%s", sysfs, name); + + if (stat(path, &st) < 0) + return NULL; + + return fopen(path, "w"); + +} + +static __attribute__((format(printf, 2, 3))) +int cs_device__print_file(const char *name, const char *fmt, ...) +{ + va_list args; + FILE *file; + int ret = -EINVAL; + + va_start(args, fmt); + file = cs_device__open_file(name); + if (file) { + ret = vfprintf(file, fmt, args); + fclose(file); + } + va_end(args); + return ret; +} + +int cs_etm_set_drv_config(struct perf_evsel_config_term *term) +{ + int ret; + char enable_sink[ENABLE_SINK_MAX]; + + snprintf(enable_sink, ENABLE_SINK_MAX, "%s/%s", + term->val.drv_cfg, "enable_sink"); + + ret = cs_device__print_file(enable_sink, "%d", 1); + if (ret < 0) + return ret; + + return 0; +} diff --git a/tools/perf/arch/arm/util/cs-etm.h b/tools/perf/arch/arm/util/cs-etm.h index 909f486d02d1..5256741be549 100644 --- a/tools/perf/arch/arm/util/cs-etm.h +++ b/tools/perf/arch/arm/util/cs-etm.h @@ -18,6 +18,9 @@ #ifndef INCLUDE__PERF_CS_ETM_H__ #define INCLUDE__PERF_CS_ETM_H__ +#include "../../util/evsel.h" + struct auxtrace_record *cs_etm_record_init(int *err); +int cs_etm_set_drv_config(struct perf_evsel_config_term *term); #endif diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c index af9fb666b44f..c11f8a13d14d 100644 --- a/tools/perf/arch/arm/util/pmu.c +++ b/tools/perf/arch/arm/util/pmu.c @@ -19,8 +19,10 @@ #include #include +#include "cs-etm.h" #include "../../util/pmu.h" + struct perf_event_attr *perf_pmu__get_default_config(struct perf_pmu *pmu __maybe_unused) { @@ -28,6 +30,7 @@ struct perf_event_attr if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) { /* add ETM default config here */ pmu->selectable = true; + pmu->set_drv_config = cs_etm_set_drv_config; } #endif return NULL;