From patchwork Thu Aug 25 11:20:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 74675 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp784821qga; Thu, 25 Aug 2016 04:21:14 -0700 (PDT) X-Received: by 10.98.80.29 with SMTP id e29mr15189066pfb.76.1472124072483; Thu, 25 Aug 2016 04:21:12 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o90si15138927pfa.214.2016.08.25.04.21.11; Thu, 25 Aug 2016 04:21:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758257AbcHYLVI (ORCPT + 27 others); Thu, 25 Aug 2016 07:21:08 -0400 Received: from mail-wm0-f48.google.com ([74.125.82.48]:38066 "EHLO mail-wm0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757632AbcHYLVF (ORCPT ); Thu, 25 Aug 2016 07:21:05 -0400 Received: by mail-wm0-f48.google.com with SMTP id o80so66606058wme.1 for ; Thu, 25 Aug 2016 04:21:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XgF8c/gFTxmYRr4w7uJjwuCcSWr7edUiZ4G1AaI+mnk=; b=Kc0XQQRRD0bMTxnAwcX/JTgRHcClQJRZpmc11bLWG4DG7CwG0B+f202ZZTWTgWUdsu ZS00ZpNIKENOxqsTMfqZeQUhdCVXeA2CojVz+zB0xpCkW1enYvxw8r0zu+BtEDexwcSb 2wJZGXc3eO2Fd1O+X31wzZabOQ9GFMLj3F9wU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XgF8c/gFTxmYRr4w7uJjwuCcSWr7edUiZ4G1AaI+mnk=; b=NDOBqNqwrk3pI+SwLGeMe5PvEl1w9VL8tbzskntzWNeFpjhSqL4mwDLN0LpNSflNS/ 8+33oK8VeOBWYf1YzpzUrnglGu/62IBtiI11TKzCWULIYTeMIKTAPFyevJq53bZrBkcP wuxD/F59R3SPCxB9kjYkfxnvw1GVmEUuPHh4QlDLf+bMPRnKOGPl+2KODxL4VBJpkLr9 N7SGD0NvOY1Ur8dMy5Z94ZvFKyz37lFOMajmvN9UoSTSH6zllL5hu0df7O1EMVIJJpI8 fq0T/c2c/EYD4zSc3vVIL+dplPo5vY1I9pL4Gz4cXVMvOYByWDsrCTtqAJY1wkP62xnk +fTQ== X-Gm-Message-State: AEkoouu2uNeV7HhYweSCQVJoGmuk1h8tGuqlpcbuCcPv5y1FbB+/XFqbC3p+CtnXu4JSWm1S X-Received: by 10.194.222.168 with SMTP id qn8mr6673522wjc.172.1472124064376; Thu, 25 Aug 2016 04:21:04 -0700 (PDT) Received: from localhost.localdomain (host-2-103-180-164.as13285.net. [2.103.180.164]) by smtp.gmail.com with ESMTPSA id o4sm14643695wjd.15.2016.08.25.04.21.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 Aug 2016 04:21:03 -0700 (PDT) From: Srinivas Kandagatla To: Stephen Boyd Cc: Andy Gross , David Brown , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Date: Thu, 25 Aug 2016 12:20:47 +0100 Message-Id: <1472124047-22627-2-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472124047-22627-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1472124047-22627-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds missing 2 PCIE common reset lines. Signed-off-by: Srinivas Kandagatla --- drivers/clk/qcom/gcc-msm8996.c | 2 ++ include/dt-bindings/clock/qcom,gcc-msm8996.h | 3 +++ 2 files changed, 5 insertions(+) -- 2.7.4 diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c index 456b2f4..993b0ed 100644 --- a/drivers/clk/qcom/gcc-msm8996.c +++ b/drivers/clk/qcom/gcc-msm8996.c @@ -3404,6 +3404,8 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = { [GCC_PCIE_2_BCR] = { 0x6e000 }, [GCC_PCIE_2_PHY_BCR] = { 0x6e038 }, [GCC_PCIE_PHY_BCR] = { 0x6f000 }, + [GCC_PCIE_PHY_COM_BCR] = { 0x6f014 }, + [GCC_PCIE_PHY_COM_NOCSR_BCR] = { 0x6f00c }, [GCC_DCD_BCR] = { 0x70000 }, [GCC_OBT_ODT_BCR] = { 0x73000 }, [GCC_UFS_BCR] = { 0x75000 }, diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h b/include/dt-bindings/clock/qcom,gcc-msm8996.h index 6f814db..b7ea1e8 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8996.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8996.h @@ -335,6 +335,9 @@ #define GCC_MSMPU_BCR 98 #define GCC_MSS_Q6_BCR 99 #define GCC_QREFS_VBG_CAL_BCR 100 +#define GCC_PCIE_PHY_COM_BCR 101 +#define GCC_PCIE_PHY_COM_NOCSR_BCR 102 + /* Indexes for GDSCs */ #define AGGRE0_NOC_GDSC 0