From patchwork Thu Jul 7 08:01:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 71552 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp1279617qgy; Thu, 7 Jul 2016 01:24:26 -0700 (PDT) X-Received: by 10.98.10.148 with SMTP id 20mr3147079pfk.154.1467879866473; Thu, 07 Jul 2016 01:24:26 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v11si3026072pfi.178.2016.07.07.01.24.26; Thu, 07 Jul 2016 01:24:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933529AbcGGIDp (ORCPT + 30 others); Thu, 7 Jul 2016 04:03:45 -0400 Received: from mail-wm0-f45.google.com ([74.125.82.45]:37698 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933454AbcGGIDg (ORCPT ); Thu, 7 Jul 2016 04:03:36 -0400 Received: by mail-wm0-f45.google.com with SMTP id a66so21403941wme.0 for ; Thu, 07 Jul 2016 01:03:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EiW7IjeANlSvXFnJYBGUCDWHuw+YGOuGZX9vQ2IWaNk=; b=Zs4yNtlEjCwL9k5+zETqE75dXIbIRPfeP+leAszFlICR2J7EqobonhOkO0CEWoYJaE Kpyr746Y1Jc88CCndtewjbK+jcaHEWKgWGfPhR59MMR4XdI9Izne8isalKGJ/N5h0V/l uRG3S/x+6rqClAIwgVSt8cPDSbZi60J0Dvxbc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EiW7IjeANlSvXFnJYBGUCDWHuw+YGOuGZX9vQ2IWaNk=; b=VlxsPkC7/g8b/hMoHBZnQNc3LkUfO4U9HC+b//eVpvNAkf1EtqO5kTPcr5p0AKx/pQ 3B2e6Oub6ENb/ENsBxvyTfZoXlv/+/CVKNLSO/SV4DGdqy0ZVoGDPjs0tuciKYz04bMT fqWb8OH1ErcJDIwqE2MyuWsbxLdO2pDUnODpIrsvofwq5p+nQdRp69XduVWlwA3X0CwE he6vpV7EnlbMffgvs95P7bb5RltUUHxG0FzNglZnnXvL6xE35PElZGTuJo9nVXlNVVVg lL9cFwx+KbxbJVeNeK3URm5/lHrpsXPQM2St/yHEMbjORT/g0ZOh8LTNIZPHTrowEtYm W85g== X-Gm-Message-State: ALyK8tJh3VttN4zXA/ij6hMKIXwVZrCG4uGs8zuvvuq99ZWSsILMqS6K5wVk/Cws2hvp8Q+U X-Received: by 10.194.25.135 with SMTP id c7mr23748473wjg.63.1467878609640; Thu, 07 Jul 2016 01:03:29 -0700 (PDT) Received: from localhost.localdomain (lft31-1-88-121-166-205.fbx.proxad.net. [88.121.166.205]) by smtp.gmail.com with ESMTPSA id v70sm51327wmf.18.2016.07.07.01.03.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 Jul 2016 01:03:29 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de, daniel.lezcano@linaro.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 38/93] clocksource/drivers/pxa: Convert init function to return error Date: Thu, 7 Jul 2016 10:01:11 +0200 Message-Id: <1467878526-1238-38-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467878526-1238-1-git-send-email-daniel.lezcano@linaro.org> References: <577E0BED.3020608@linaro.org> <1467878526-1238-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano --- drivers/clocksource/pxa_timer.c | 46 +++++++++++++++++++++++++++++------------ 1 file changed, 33 insertions(+), 13 deletions(-) -- 1.9.1 diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c index 45b6a49..59af75c 100644 --- a/drivers/clocksource/pxa_timer.c +++ b/drivers/clocksource/pxa_timer.c @@ -150,8 +150,10 @@ static struct irqaction pxa_ost0_irq = { .dev_id = &ckevt_pxa_osmr0, }; -static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate) +static int __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate) { + int ret; + timer_writel(0, OIER); timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); @@ -159,41 +161,59 @@ static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate) ckevt_pxa_osmr0.cpumask = cpumask_of(0); - setup_irq(irq, &pxa_ost0_irq); + ret = setup_irq(irq, &pxa_ost0_irq); + if (ret) { + pr_err("Failed to setup irq"); + return ret; + } + + ret = clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200, + 32, clocksource_mmio_readl_up); + if (ret) { + pr_err("Failed to init clocksource"); + return ret; + } - clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200, - 32, clocksource_mmio_readl_up); clockevents_config_and_register(&ckevt_pxa_osmr0, clock_tick_rate, MIN_OSCR_DELTA * 2, 0x7fffffff); + + return 0; } -static void __init pxa_timer_dt_init(struct device_node *np) +static int __init pxa_timer_dt_init(struct device_node *np) { struct clk *clk; - int irq; + int irq, ret; /* timer registers are shared with watchdog timer */ timer_base = of_iomap(np, 0); - if (!timer_base) - panic("%s: unable to map resource\n", np->name); + if (!timer_base) { + pr_err("%s: unable to map resource\n", np->name); + return -ENXIO; + } clk = of_clk_get(np, 0); if (IS_ERR(clk)) { pr_crit("%s: unable to get clk\n", np->name); - return; + return PTR_ERR(clk); + } + + ret = clk_prepare_enable(clk); + if (ret) { + pr_crit("Failed to prepare clock"); + return ret; } - clk_prepare_enable(clk); /* we are only interested in OS-timer0 irq */ irq = irq_of_parse_and_map(np, 0); if (irq <= 0) { pr_crit("%s: unable to parse OS-timer0 irq\n", np->name); - return; + return -EINVAL; } - pxa_timer_common_init(irq, clk_get_rate(clk)); + return pxa_timer_common_init(irq, clk_get_rate(clk)); } -CLOCKSOURCE_OF_DECLARE(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init); +CLOCKSOURCE_OF_DECLARE_RET(pxa_timer, "marvell,pxa-timer", pxa_timer_dt_init); /* * Legacy timer init for non device-tree boards.