From patchwork Fri Jun 17 15:14:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 70339 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp334312qgy; Fri, 17 Jun 2016 08:15:02 -0700 (PDT) X-Received: by 10.66.167.168 with SMTP id zp8mr2953467pab.20.1466176496158; Fri, 17 Jun 2016 08:14:56 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c186si12911997pfa.69.2016.06.17.08.14.55; Fri, 17 Jun 2016 08:14:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933736AbcFQPOi (ORCPT + 30 others); Fri, 17 Jun 2016 11:14:38 -0400 Received: from mail-wm0-f49.google.com ([74.125.82.49]:38831 "EHLO mail-wm0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933700AbcFQPOf (ORCPT ); Fri, 17 Jun 2016 11:14:35 -0400 Received: by mail-wm0-f49.google.com with SMTP id m124so3859972wme.1 for ; Fri, 17 Jun 2016 08:14:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1sAD8eACtvQsOMii6xPTrO0bRFLjTgrXlf3ptebvnqk=; b=XljBYy+vBaEMaUPRNx8yWOFGkBE865FvCW6euCpRV46A0EOBuE603KHbWixVRSlw6q RMaHwQNL2L9HC0/qPEt6l0NO0duedTG1lob53eMyGADerTKR3dNERgHKectx9HOPVFPj cnuLgvD705c/r8Js736xA9S6VU4zVZ4hdroxM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1sAD8eACtvQsOMii6xPTrO0bRFLjTgrXlf3ptebvnqk=; b=AxYDosMi6J4jaMrXVKxAGUk+uyPBDjX5jtGAIxLZkvOrccCtxHCLQAdAU7klGUVS+S 7adkUTbMXCdSEbj8Q56Qonn8vaoNI0zn/3cJuM8uDzNgW7cC55kYQE/lKB6/OkI7fhp+ NZhz1E9te3ENn8aY1Zv7VSFZxCvrroKWR8qrmO1lXihFXUG6vM1wZdr9bCVghyZFoVX3 zg3Yt/vLA3mCSsRvUXhwUUs936DdMG3YwkpPd6WNLOMS6nhzoiuCWzSrz1NgMSAtclNr i5gLmEdCH6GKE4d5HfCo1bsGXUQnjJfiZ9cR/y6eqSJmoM2mje2ynds+ZxOI8OT8dg+X Lxdw== X-Gm-Message-State: ALyK8tLnFRF55xrAhWkIGHAdO4EHTjdJScDl3Miq7utnveJL/MF7pY5waSli++xF4ui4l40j X-Received: by 10.194.133.161 with SMTP id pd1mr2910453wjb.16.1466176473481; Fri, 17 Jun 2016 08:14:33 -0700 (PDT) Received: from localhost.localdomain (host-92-17-247-99.as13285.net. [92.17.247.99]) by smtp.gmail.com with ESMTPSA id o129sm4240934wmb.17.2016.06.17.08.14.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Jun 2016 08:14:32 -0700 (PDT) From: Srinivas Kandagatla To: Andy Gross Cc: Rob Herring , David Brown , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 05/16] arm64: dts: msm8996: add blsp1_i2c2 pinctrl nodes. Date: Fri, 17 Jun 2016 16:14:02 +0100 Message-Id: <1466176454-28084-6-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1466176454-28084-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1466176454-28084-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds pinctrl nodes required for blsp1_i2c2. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 03c1e0d..1f6a0a4 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -13,6 +13,30 @@ &msmgpio { + blsp1_i2c2_default: blsp1_i2c2_default { + pinmux { + function = "blsp_i2c3"; + pins = "gpio47", "gpio48"; + }; + pinconf { + pins = "gpio47", "gpio48"; + drive-strength = <16>; + bias-disable = <0>; + }; + }; + + blsp1_i2c2_sleep: blsp1_i2c2_sleep { + pinmux { + function = "gpio"; + pins = "gpio47", "gpio48"; + }; + pinconf { + pins = "gpio47", "gpio48"; + drive-strength = <2>; + bias-disable = <0>; + }; + }; + blsp2_uart1_2pins_default: blsp2_uart1_2pins { pinmux { function = "blsp_uart8";