From patchwork Fri Jun 17 15:14:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 70341 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp334352qgy; Fri, 17 Jun 2016 08:15:06 -0700 (PDT) X-Received: by 10.98.155.29 with SMTP id r29mr2937117pfd.11.1466176497115; Fri, 17 Jun 2016 08:14:57 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c186si12911997pfa.69.2016.06.17.08.14.56; Fri, 17 Jun 2016 08:14:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161248AbcFQPOu (ORCPT + 30 others); Fri, 17 Jun 2016 11:14:50 -0400 Received: from mail-wm0-f54.google.com ([74.125.82.54]:37929 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161057AbcFQPOo (ORCPT ); Fri, 17 Jun 2016 11:14:44 -0400 Received: by mail-wm0-f54.google.com with SMTP id m124so3865889wme.1 for ; Fri, 17 Jun 2016 08:14:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qoRqZcFStfV20TN2AQQYGHsFjwh1X5pJBg1eTNFqclc=; b=QjbcyfXiNutAZ3LA1plZyxBgbOh4ygM4xWirFuL03WnauyHNBQeZxu4jHF1LtL3XVE TuxjTms1pP3pY0wUO3IchnsEkwNRGzrxoOCkYID28YydlrUNKWyqM/UTkIdx305tRcsA gEs9Q2hkxmKrwzmgEt3rDqEBFxFcF21/WhkQo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qoRqZcFStfV20TN2AQQYGHsFjwh1X5pJBg1eTNFqclc=; b=QcGvRY66XaB7Tkt9Tz29iOnJ5osjl/p9wjG54YkNd7bXO/bsoC0CERMX12NPs1pixd DFOkk88ocr8HO0pPyg0NI3PxuvBVLftd1Lq8sNjHtpAi1KTjgvhh0R9maFAxqo1ooKOL yemHZWhWnpQilnvJvvv7cIol6Lw9OV4YKoa+ZOardDHc3wjwVma37ra2KzDnUHEXx33C xONPDal2q/zU4XjSeCjLj+RqNLamLaMPPEGoG9MNySpu/2HH15a0/F2HGwux5HTujadx nOQQAaBA80MUrQ4PSJnT9o7sR+LiCbce88xPFnkAzZYAJHrBfwM25zCau9oAGTtB83M4 rqUw== X-Gm-Message-State: ALyK8tIXw3hsoLCTF+yUXZc8hf+ztYQSImi/ewm1ldHQfiE0D+ydobGp0FR7HhCRkdvTS5/S X-Received: by 10.28.156.77 with SMTP id f74mr2977581wme.82.1466176483034; Fri, 17 Jun 2016 08:14:43 -0700 (PDT) Received: from localhost.localdomain (host-92-17-247-99.as13285.net. [92.17.247.99]) by smtp.gmail.com with ESMTPSA id o129sm4240934wmb.17.2016.06.17.08.14.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Jun 2016 08:14:42 -0700 (PDT) From: Srinivas Kandagatla To: Andy Gross Cc: Rob Herring , David Brown , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 13/16] arm64: dts: msm8996: add support to blsp2_spi5 pinctrl Date: Fri, 17 Jun 2016 16:14:10 +0100 Message-Id: <1466176454-28084-14-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1466176454-28084-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1466176454-28084-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds pinctrl required for blsp2_spi5 device. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 34 ++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi index 9fd37a0..551707a 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi @@ -218,4 +218,38 @@ bias-disable; }; }; + + blsp2_spi5_default: blsp2_spi5_default { + pinmux { + function = "blsp_spi12"; + pins = "gpio85", "gpio86", "gpio88"; + }; + pinmux_cs { + function = "gpio"; + pins = "gpio87"; + }; + pinconf { + pins = "gpio85", "gpio86", "gpio88"; + drive-strength = <12>; + bias-disable; + }; + pinconf_cs { + pins = "gpio87"; + drive-strength = <16>; + bias-disable; + output-high; + }; + }; + + blsp2_spi5_sleep: blsp2_spi5_sleep { + pinmux { + function = "gpio"; + pins = "gpio85", "gpio86", "gpio87", "gpio88"; + }; + pinconf { + pins = "gpio85", "gpio86", "gpio87", "gpio88"; + drive-strength = <2>; + bias-pull-down; + }; + }; };