From patchwork Fri Jun 17 15:14:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 70350 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp335361qgy; Fri, 17 Jun 2016 08:17:15 -0700 (PDT) X-Received: by 10.36.16.67 with SMTP id 64mr4219723ity.88.1466176624757; Fri, 17 Jun 2016 08:17:04 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p64si99558pfi.102.2016.06.17.08.17.04; Fri, 17 Jun 2016 08:17:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161350AbcFQPQm (ORCPT + 30 others); Fri, 17 Jun 2016 11:16:42 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:35855 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933758AbcFQPOn (ORCPT ); Fri, 17 Jun 2016 11:14:43 -0400 Received: by mail-wm0-f42.google.com with SMTP id f126so2165911wma.1 for ; Fri, 17 Jun 2016 08:14:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DSfhHzJlGN97eYiFx/GmFddlvjQtss95/lgEs0gz2vY=; b=atwcMlNwYTkjfQkcfu24niWrT4kyKo1CGjw7OKZZpX7G540pAefvGK+FQyPrut6jIX pMMKFnTkbNgpt6xsA9mPqnmFnvETqXTf4W2qmK2I3XmfR6BXCRLL6lZdXOdb2B63DgTC Uvf28UjT+gXM9Zzano/9fe6eBJ7EQeRKdtQ9Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DSfhHzJlGN97eYiFx/GmFddlvjQtss95/lgEs0gz2vY=; b=TLnnKvMmW7OtUqNvEs1KtyJVh0J3+n0KcBkcg4fPnwC3pADIIP1zcBoLoOovx7t7RG miNbhBbaUd3S7Bzar4i8Yt6Tduj5ltVPUzn9fLloFhJTdnF3I4sVtF/z1rsP3wayETOH RSUQijmQiCsb2BvDy7sd/ZYEp2vk62L4bktPEiXS7KwZ1jyZAch9zzaZBy125sLrHD1p PWVIe6FOzfKq9IfqYxUtU2VepPzSca85B1gcN6b+yYyeluUG9mWT3GAaB6zGtazqE7P1 rkzKRYxqN/NKDnGCZlMl7h8GF7B9IetdPMPZAPdWRA7dXhRuco4UHiH6vMlc0tbe6s9A 2I0w== X-Gm-Message-State: ALyK8tLDvraPsUPE/qLQgZDxa79pZ702IjQD2dBU/kW+BrvVXFG9TIfYTb5BcYtkj8Cp3aB2 X-Received: by 10.28.109.198 with SMTP id b67mr2983000wmi.53.1466176481861; Fri, 17 Jun 2016 08:14:41 -0700 (PDT) Received: from localhost.localdomain (host-92-17-247-99.as13285.net. [92.17.247.99]) by smtp.gmail.com with ESMTPSA id o129sm4240934wmb.17.2016.06.17.08.14.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 17 Jun 2016 08:14:41 -0700 (PDT) From: Srinivas Kandagatla To: Andy Gross Cc: Rob Herring , David Brown , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 12/16] arm64: dts: msm8996: add support to blsp1_spi0 Date: Fri, 17 Jun 2016 16:14:09 +0100 Message-Id: <1466176454-28084-13-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1466176454-28084-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1466176454-28084-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds support to blsp1_spi0 which is used on some of APQ8096 based boards. Signed-off-by: Srinivas Kandagatla --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 675888f..e009063 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -151,6 +151,21 @@ reg = <0x300000 0x90000>; }; + blsp1_spi0: spi@07575000 { + compatible = "qcom,spi-qup-v2.2.1"; + reg = <0x07575000 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&blsp1_spi0_default>; + pinctrl-1 = <&blsp1_spi0_sleep>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + blsp2_i2c0: i2c@075b5000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x075b5000 0x1000>;