From patchwork Thu Jun 2 13:54:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Murali Karicheri X-Patchwork-Id: 69166 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp130967qgf; Thu, 2 Jun 2016 06:55:34 -0700 (PDT) X-Received: by 10.98.5.133 with SMTP id 127mr4840498pff.110.1464875734880; Thu, 02 Jun 2016 06:55:34 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i124si734881pfg.4.2016.06.02.06.55.34; Thu, 02 Jun 2016 06:55:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161086AbcFBNzb (ORCPT + 31 others); Thu, 2 Jun 2016 09:55:31 -0400 Received: from bear.ext.ti.com ([198.47.19.11]:58843 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932692AbcFBNz3 (ORCPT ); Thu, 2 Jun 2016 09:55:29 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u52DsZat014745; Thu, 2 Jun 2016 08:54:35 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u52DsZBP007100; Thu, 2 Jun 2016 08:54:35 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 2 Jun 2016 08:54:34 -0500 Received: from ula0868495.am.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u52DsWup015450; Thu, 2 Jun 2016 08:54:34 -0500 From: Murali Karicheri To: , , , , , , , , , Subject: [PATCH 2/2] ARM: dts: keystone: add interrupt property to PCI controller bindings Date: Thu, 2 Jun 2016 09:54:41 -0400 Message-ID: <1464875681-14543-2-git-send-email-m-karicheri2@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464875681-14543-1-git-send-email-m-karicheri2@ti.com> References: <1464875681-14543-1-git-send-email-m-karicheri2@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that Keystone PCIe controller supports error interrupt handling add interrupt property to PCI controller DT bindings to enable error interrupt handling. Signed-off-by: Murali Karicheri --- - applies to master v4.7-rcx at kernel.org git repo arch/arm/boot/dts/keystone-k2e.dtsi | 2 ++ arch/arm/boot/dts/keystone.dtsi | 2 ++ 2 files changed, 4 insertions(+) -- 1.9.1 diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi index 5374c9a..9a51b8c 100644 --- a/arch/arm/boot/dts/keystone-k2e.dtsi +++ b/arch/arm/boot/dts/keystone-k2e.dtsi @@ -104,6 +104,8 @@ num-lanes = <2>; bus-range = <0x00 0xff>; + /* error interrupt */ + interrupts = ; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */ diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi index f627a1c..e23f46d 100644 --- a/arch/arm/boot/dts/keystone.dtsi +++ b/arch/arm/boot/dts/keystone.dtsi @@ -302,6 +302,8 @@ num-lanes = <2>; bus-range = <0x00 0xff>; + /* error interrupt */ + interrupts = ; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */