From patchwork Tue Apr 26 16:36:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 66708 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp1715864qge; Tue, 26 Apr 2016 09:37:34 -0700 (PDT) X-Received: by 10.98.79.6 with SMTP id d6mr5058388pfb.22.1461688654130; Tue, 26 Apr 2016 09:37:34 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b13si5119550pfc.70.2016.04.26.09.37.33; Tue, 26 Apr 2016 09:37:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752614AbcDZQhc (ORCPT + 29 others); Tue, 26 Apr 2016 12:37:32 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:60143 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751980AbcDZQhR (ORCPT ); Tue, 26 Apr 2016 12:37:17 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u3QGaiNn005018; Tue, 26 Apr 2016 11:36:44 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3QGaiP0026314; Tue, 26 Apr 2016 11:36:44 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Tue, 26 Apr 2016 11:36:44 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3QGahIV012600; Tue, 26 Apr 2016 11:36:43 -0500 From: Nishanth Menon To: Tony Lindgren , Mark Brown CC: Liam Girdwood , , , , Nishanth Menon , Keerthy Subject: [PATCH] regulator: tps65917/palmas: Add bypass "On" value Date: Tue, 26 Apr 2016 11:36:42 -0500 Message-ID: <1461688602-19996-1-git-send-email-nm@ti.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When commit b554e1450658 ("regulator: tps65917/palmas: Add bypass ops for LDOs with bypass capability") introduced bypass capability to palmas regulator, it went with the assumption that regulator regmap helpers just check val against the bypass_mask. Unfortunately, this ignored the explicit "on" and "off" values when the register value is masked with bypass_mask in commit ca5d1b3524b4 ("regulator: helpers: Modify helpers enabling multi-bit control"). With the recent commit dd1a571daee7 ("regulator: helpers: Ensure bypass register field matches ON value"), this issue gets highlighted and fails tps65917/palmas based platforms which need regulators/ldos that have bypass capability. Introduce the bypass_on value appropriately for tps65917/palmas regulator. Fixes: b554e1450658 ("regulator: tps65917/palmas: Add bypass ops for LDOs with bypass capability") Cc: Keerthy Cc: Mark Brown Signed-off-by: Nishanth Menon --- Fixes regression in next-20160426 for DRA7 platforms and BeagleBoard-X15 Fail in boot: http://pastebin.ubuntu.com/16065715/ drivers/regulator/palmas-regulator.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.8.0 diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c index 6efc7ee8aea3..c83e06b2cedb 100644 --- a/drivers/regulator/palmas-regulator.c +++ b/drivers/regulator/palmas-regulator.c @@ -944,6 +944,8 @@ static int palmas_ldo_registration(struct palmas_pmic *pmic, if (id == PALMAS_REG_LDO9) { desc->ops = &palmas_ops_ldo9; desc->bypass_reg = desc->enable_reg; + desc->bypass_val_on = + PALMAS_LDO9_CTRL_LDO_BYPASS_EN; desc->bypass_mask = PALMAS_LDO9_CTRL_LDO_BYPASS_EN; } @@ -1055,6 +1057,8 @@ static int tps65917_ldo_registration(struct palmas_pmic *pmic, id == TPS65917_REG_LDO2) { desc->ops = &tps65917_ops_ldo_1_2; desc->bypass_reg = desc->enable_reg; + desc->bypass_val_on = + TPS65917_LDO1_CTRL_BYPASS_EN; desc->bypass_mask = TPS65917_LDO1_CTRL_BYPASS_EN; } @@ -1206,6 +1210,7 @@ static int palmas_smps_registration(struct palmas_pmic *pmic, desc->enable_mask = SMPS10_BOOST_EN; desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, PALMAS_SMPS10_CTRL); + desc->bypass_val_on = SMPS10_BYPASS_EN; desc->bypass_mask = SMPS10_BYPASS_EN; desc->min_uV = 3750000; desc->uV_step = 1250000;